Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2919ee2d authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-cleanups' 



Ido Schimmel says:

====================
mlxsw: Various cleanups

The first nine patches from Jiri perform small and unrelated cleanups.
The largest being the conversion of the KVD linear partitions from a
list to an array, which simplifies the code.

The last patch from Petr is a bug fix for a recent net-next commit that
prevented the "kvd" resource from being marked as the parent of its
various child resources (e.g., "/kvd/linear").

v2: Dropped devlink patch following David's comment. Will be sent
separately.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 06b19fe9 59441fef

drivers/net/ethernet/mellanox/mlxsw/core.c

+3 −2
Original line number Diff line number Diff line
@@ -1008,6 +1008,7 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 
	const char *device_kind = mlxsw_bus_info->device_kind;

	struct mlxsw_core *mlxsw_core;

	struct mlxsw_driver *mlxsw_driver;

	struct mlxsw_res *res;

	size_t alloc_size;

	int err;
@@ -1032,8 +1033,8 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 
	mlxsw_core->bus_priv = bus_priv;

	mlxsw_core->bus_info = mlxsw_bus_info;



	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile,

			      &mlxsw_core->res);

	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;

	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);

	if (err)

		goto err_bus_init;

drivers/net/ethernet/mellanox/mlxsw/core.h

+6 −8
Original line number Diff line number Diff line
@@ -235,8 +235,7 @@ struct mlxsw_config_profile { 
		used_max_pkey:1,

		used_ar_sec:1,

		used_adaptive_routing_group_cap:1,

		used_kvd_split_data:1; /* indicate for the kvd's values */



		used_kvd_sizes:1;

	u8	max_vepa_channels;

	u16	max_mid;

	u16	max_pgt;
@@ -256,10 +255,8 @@ struct mlxsw_config_profile { 
	u16	adaptive_routing_group_cap;

	u8	arn;

	u32	kvd_linear_size;

	u16	kvd_hash_granularity;

	u8	kvd_hash_single_parts;

	u8	kvd_hash_double_parts;

	u8	resource_query_enable;

	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];

};
@@ -316,6 +313,7 @@ struct mlxsw_driver { 
			     u64 *p_linear_size);

	u8 txhdr_len;

	const struct mlxsw_config_profile *profile;

	bool res_query_enabled;

};



int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
@@ -326,14 +324,14 @@ int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 
bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,

			  enum mlxsw_res_id res_id);



#define MLXSW_CORE_RES_VALID(res, short_res_id)			\

	mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id)

#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id)			\

	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)



u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,

		       enum mlxsw_res_id res_id);



#define MLXSW_CORE_RES_GET(res, short_res_id)			\

	mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id)

#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id)			\

	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)



#define MLXSW_BUS_F_TXRX	BIT(0)

drivers/net/ethernet/mellanox/mlxsw/pci.c

+4 −7
Original line number Diff line number Diff line
@@ -1015,16 +1015,14 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci, 
}



static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,

				     struct mlxsw_res *res,

				     u8 query_enabled)

				     struct mlxsw_res *res)

{

	int index, i;

	u64 data;

	u16 id;

	int err;



	/* Not all the versions support resources query */

	if (!query_enabled)

	if (!res)

		return 0;



	mlxsw_cmd_mbox_zero(mbox);
@@ -1164,7 +1162,7 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox, 
		mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(

			mbox, profile->adaptive_routing_group_cap);

	}

	if (MLXSW_RES_VALID(res, KVD_SIZE)) {

	if (profile->used_kvd_sizes && MLXSW_RES_VALID(res, KVD_SIZE)) {

		err = mlxsw_pci_profile_get_kvd_sizes(mlxsw_pci, profile, res);

		if (err)

			return err;
@@ -1376,8 +1374,7 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core, 
	if (err)

		goto err_boardinfo;



	err = mlxsw_pci_resources_query(mlxsw_pci, mbox, res,

					profile->resource_query_enable);

	err = mlxsw_pci_resources_query(mlxsw_pci, mbox, res);

	if (err)

		goto err_query_resources;

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+7 −9
Original line number Diff line number Diff line
@@ -3793,8 +3793,7 @@ static const struct mlxsw_config_profile mlxsw_sp_config_profile = { 
	.max_ib_mc			= 0,

	.used_max_pkey			= 1,

	.max_pkey			= 0,

	.used_kvd_split_data		= 1,

	.kvd_hash_granularity		= MLXSW_SP_KVD_GRANULARITY,

	.used_kvd_sizes			= 1,

	.kvd_hash_single_parts		= 59,

	.kvd_hash_double_parts		= 41,

	.kvd_linear_size		= MLXSW_SP_KVD_LINEAR_SIZE,
@@ -3804,7 +3803,6 @@ static const struct mlxsw_config_profile mlxsw_sp_config_profile = { 
			.type		= MLXSW_PORT_SWID_TYPE_ETH,

		}

	},

	.resource_query_enable		= 1,

};



static u64 mlxsw_sp_resource_kvd_linear_occ_get(struct devlink *devlink)
@@ -3815,7 +3813,7 @@ static u64 mlxsw_sp_resource_kvd_linear_occ_get(struct devlink *devlink) 
	return mlxsw_sp_kvdl_occ_get(mlxsw_sp);

}



static struct devlink_resource_ops mlxsw_sp_resource_kvd_linear_ops = {

static const struct devlink_resource_ops mlxsw_sp_resource_kvd_linear_ops = {

	.occ_get = mlxsw_sp_resource_kvd_linear_occ_get,

};
@@ -3894,7 +3892,7 @@ static int mlxsw_sp_resources_register(struct mlxsw_core *mlxsw_core) 
	if (err)

		return err;



	err = mlxsw_sp_kvdl_resources_register(devlink);

	err = mlxsw_sp_kvdl_resources_register(mlxsw_core);

	if  (err)

		return err;
@@ -3902,7 +3900,7 @@ static int mlxsw_sp_resources_register(struct mlxsw_core *mlxsw_core) 
	double_size *= profile->kvd_hash_double_parts;

	double_size /= profile->kvd_hash_double_parts +

		       profile->kvd_hash_single_parts;

	double_size = rounddown(double_size, profile->kvd_hash_granularity);

	double_size = rounddown(double_size, MLXSW_SP_KVD_GRANULARITY);

	err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_HASH_DOUBLE,

					double_size,

					MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE,
@@ -3935,8 +3933,7 @@ static int mlxsw_sp_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 
	int err;



	if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SINGLE_MIN_SIZE) ||

	    !MLXSW_CORE_RES_VALID(mlxsw_core, KVD_DOUBLE_MIN_SIZE) ||

	    !profile->used_kvd_split_data)

	    !MLXSW_CORE_RES_VALID(mlxsw_core, KVD_DOUBLE_MIN_SIZE))

		return -EIO;



	/* The hash part is what left of the kvd without the
@@ -3962,7 +3959,7 @@ static int mlxsw_sp_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 
		double_size /= profile->kvd_hash_double_parts +

			       profile->kvd_hash_single_parts;

		*p_double_size = rounddown(double_size,

					   profile->kvd_hash_granularity);

					   MLXSW_SP_KVD_GRANULARITY);

	}



	err = devlink_resource_size_get(devlink,
@@ -4004,6 +4001,7 @@ static struct mlxsw_driver mlxsw_sp_driver = { 
	.kvd_sizes_get			= mlxsw_sp_kvd_sizes_get,

	.txhdr_len			= MLXSW_TXHDR_LEN,

	.profile			= &mlxsw_sp_config_profile,

	.res_query_enabled		= true,

};



bool mlxsw_sp_port_dev_check(const struct net_device *dev)

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+2 −2
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ 
#define MLXSW_SP_RESOURCE_NAME_KVD_LINEAR_LARGE_CHUNKS "large_chunks"



enum mlxsw_sp_resource_id {

	MLXSW_SP_RESOURCE_KVD,

	MLXSW_SP_RESOURCE_KVD = 1,

	MLXSW_SP_RESOURCE_KVD_LINEAR,

	MLXSW_SP_RESOURCE_KVD_HASH_SINGLE,

	MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE,
@@ -443,7 +443,7 @@ int mlxsw_sp_kvdl_alloc_size_query(struct mlxsw_sp *mlxsw_sp, 
				   unsigned int entry_count,

				   unsigned int *p_alloc_size);

u64 mlxsw_sp_kvdl_occ_get(const struct mlxsw_sp *mlxsw_sp);

int mlxsw_sp_kvdl_resources_register(struct devlink *devlink);

int mlxsw_sp_kvdl_resources_register(struct mlxsw_core *mlxsw_core);



struct mlxsw_sp_acl_rule_info {

	unsigned int priority;