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Commit 2864f5f6 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "dt-bindings: clocks: Update gcc clock bindings for Lahaina"

parents 7a98c2c4 caf3ddc3

bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ Required properties : 
			"qcom,lahaina-gcc"



- reg : shall contain base register location and length

- vdd_cx-supply: The vdd_cx logic rail supply.

- #clock-cells : shall contain 1

- #reset-cells : shall contain 1

qcom/lahaina.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -590,6 +590,7 @@ 
		compatible = "qcom,lahaina-gpucc", "syscon";

		reg = <0x3d90000 0x9000>;

		reg-names = "cc_base";

		vdd_mx-supply = <&VDD_MXA_LEVEL>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};