Commit 28212321 authored Jun 28, 2019 by Imre Deak

drm/i915: Tune down WARNs about TBT AUX power well enabling



The HW completion flag for the TBT AUX power well enabling/disabling
gets stuck if the firmware tears down the TBT DP tunnel before the
completion.

We shouldn't complain about the timeout, since it's expected to happen
and doesn't cause further issues. We suppress the disabling timeout
already, do the same for enabling.

v2:
- Make the debug message more precise. (José)

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628143635.22066-3-imre.deak@intel.com

parent 39a5883f

drivers/gpu/drm/i915/display/intel_display_power.c

+11 −5

Original line number	Diff line number	Diff line
		@@ -269,11 +269,17 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
		int pw_idx = power_well->desc->hsw.idx;

		/* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
		WARN_ON(intel_wait_for_register(&dev_priv->uncore,
		if (intel_wait_for_register(&dev_priv->uncore,
		regs->driver,
		HSW_PWR_WELL_CTL_STATE(pw_idx),
		HSW_PWR_WELL_CTL_STATE(pw_idx),
		1));
		1)) {
		DRM_DEBUG_KMS("%s power well enable timeout\n",
		power_well->desc->name);

		/* An AUX timeout is expected if the TBT DP tunnel is down. */
		WARN_ON(!power_well->desc->hsw.is_tc_tbt);
		}
		}

		static u32 hsw_power_well_requesters(struct drm_i915_private *dev_priv,