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Commit 2807b1b5 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: correct dcc offset on sdxlemur"

parents 6966a06b 220a9e97

qcom/sdxlemur.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -210,12 +210,12 @@ 
	dcc: dcc_v2@117f000 {

		compatible = "qcom,dcc-v2";

		reg = <0x117f000 0x1000>,

		      <0x1100000 0x2000>;

		      <0x1100800 0x1800>;



		qcom,transaction_timeout = <0>;



		reg-names = "dcc-base", "dcc-ram-base";

		dcc-ram-offset = <0x12000>;

		dcc-ram-offset = <0x800>;



		link_list1 {

			qcom,curr-link-list = <2>;