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Commit 27971d61 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Joonas Lahtinen
Browse files

drm/i915: Clean up skl_program_scaler() 



Remove the "sizes are 0 based" stuff that is not even true for the
scaler.

v2: Rebase

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151736.20522-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit d0105af9)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent 2a277799

drivers/gpu/drm/i915/intel_sprite.c

+5 −12
Original line number Diff line number Diff line
@@ -303,12 +303,11 @@ skl_plane_max_stride(struct intel_plane *plane, 
}



static void

skl_program_scaler(struct drm_i915_private *dev_priv,

		   struct intel_plane *plane,

skl_program_scaler(struct intel_plane *plane,

		   const struct intel_crtc_state *crtc_state,

		   const struct intel_plane_state *plane_state)

{

	enum plane_id plane_id = plane->id;

	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);

	enum pipe pipe = plane->pipe;

	int scaler_id = plane_state->scaler_id;

	const struct intel_scaler *scaler =
@@ -320,10 +319,6 @@ skl_program_scaler(struct drm_i915_private *dev_priv, 
	u16 y_hphase, uv_rgb_hphase;

	u16 y_vphase, uv_rgb_vphase;



	/* Sizes are 0 based */

	crtc_w--;

	crtc_h--;



	/* TODO: handle sub-pixel coordinates */

	if (plane_state->base.fb->format->format == DRM_FORMAT_NV12) {

		y_hphase = skl_scaler_calc_phase(1, false);
@@ -342,15 +337,14 @@ skl_program_scaler(struct drm_i915_private *dev_priv, 
	}



	I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id),

		      PS_SCALER_EN | PS_PLANE_SEL(plane_id) | scaler->mode);

		      PS_SCALER_EN | PS_PLANE_SEL(plane->id) | scaler->mode);

	I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);

	I915_WRITE_FW(SKL_PS_VPHASE(pipe, scaler_id),

		      PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));

	I915_WRITE_FW(SKL_PS_HPHASE(pipe, scaler_id),

		      PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));

	I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);

	I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id),

		      ((crtc_w + 1) << 16)|(crtc_h + 1));

	I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (crtc_w << 16) | crtc_h);

}



void
@@ -399,9 +393,8 @@ skl_update_plane(struct intel_plane *plane, 
		      (plane_state->color_plane[1].y << 16) |

		      plane_state->color_plane[1].x);



	/* program plane scaler */

	if (plane_state->scaler_id >= 0) {

		skl_program_scaler(dev_priv, plane, crtc_state, plane_state);

		skl_program_scaler(plane, crtc_state, plane_state);



		I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);

	} else {