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Commit 27593d72 authored by Madhavan Srinivasan's avatar Madhavan Srinivasan Committed by Michael Ellerman
Browse files

powerpc/perf: Use MSR to report privilege level on P9 DD1 



SIER and SIAR are not updated correctly for some samples, so force the
use of MSR and regs->nip instead for misc_flag updates. This is done by
adding a new ppmu flag and updating the use_siar logic in
perf_read_regs() to use it, and dropping the PPMU_HAS_SIER flag.

Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
[mpe: Rename flag to PPMU_NO_SIAR, and also drop PPMU_HAS_SIER]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent df21d2fa

arch/powerpc/include/asm/perf_event_server.h

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ struct power_pmu { 
#define PPMU_HAS_SSLOT		0x00000020 /* Has sampled slot in MMCRA */

#define PPMU_HAS_SIER		0x00000040 /* Has SIER */

#define PPMU_ARCH_207S		0x00000080 /* PMC is architecture v2.07S */

#define PPMU_NO_SIAR		0x00000100 /* Do not use SIAR */



/*

 * Values for flags to get_alternatives()

arch/powerpc/perf/core-book3s.c

+2 −0
Original line number Diff line number Diff line
@@ -295,6 +295,8 @@ static inline void perf_read_regs(struct pt_regs *regs) 
	 */

	if (TRAP(regs) != 0xf00)

		use_siar = 0;

	else if ((ppmu->flags & PPMU_NO_SIAR))

		use_siar = 0;

	else if (marked)

		use_siar = 1;

	else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))

arch/powerpc/perf/power9-pmu.c

+1 −1
Original line number Diff line number Diff line
@@ -384,7 +384,7 @@ static struct power_pmu power9_isa207_pmu = { 
	.bhrb_filter_map	= power9_bhrb_filter_map,

	.get_constraint		= isa207_get_constraint,

	.disable_pmc		= isa207_disable_pmc,

	.flags			= PPMU_HAS_SIER | PPMU_ARCH_207S,

	.flags			= PPMU_NO_SIAR | PPMU_ARCH_207S,

	.n_generic		= ARRAY_SIZE(power9_generic_events),

	.generic_events		= power9_generic_events,

	.cache_events		= &power9_cache_events,