Merge "msm: camera: isp: Fix for disable UBWC case" into camera-kernel.lnx.4.0 (273ce862) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/cam_icp/icp_hw/a5_hw/a5_core.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -709,6 +709,9 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
		if (*disable_ubwc_comp) {
		ubwc_ipe_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
		ubwc_bps_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
		CAM_DBG(CAM_ICP,
		"Force disable UBWC compression, ubwc_ipe_cfg: 0x%x, ubwc_bps_cfg: 0x%x",
		ubwc_ipe_cfg[1], ubwc_bps_cfg[1]);
		}
		rc = hfi_cmd_ubwc_config_ext(&ubwc_ipe_cfg[0],
		&ubwc_bps_cfg[0]);

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

+5 −22

Original line number	Diff line number	Diff line
		@@ -1267,6 +1267,8 @@ static int cam_ife_hw_mgr_acquire_res_ife_out_rdi(
		vfe_acquire.vfe_out.split_id = CAM_ISP_HW_SPLIT_LEFT;
		vfe_acquire.vfe_out.unique_id = ife_ctx->ctx_index;
		vfe_acquire.vfe_out.is_dual = 0;
		vfe_acquire.vfe_out.disable_ubwc_comp =
		g_ife_hw_mgr.debug_cfg.disable_ubwc_comp;
		vfe_acquire.event_cb = cam_ife_hw_mgr_event_handler;
		hw_intf = ife_src_res->hw_res[0]->hw_intf;
		rc = hw_intf->hw_ops.reserve(hw_intf->hw_priv,
		@@ -1347,6 +1349,8 @@ static int cam_ife_hw_mgr_acquire_res_ife_out_pixel(
		vfe_acquire.vfe_out.out_port_info = out_port;
		vfe_acquire.vfe_out.is_dual = ife_src_res->is_dual_isp;
		vfe_acquire.vfe_out.unique_id = ife_ctx->ctx_index;
		vfe_acquire.vfe_out.disable_ubwc_comp =
		g_ife_hw_mgr.debug_cfg.disable_ubwc_comp;
		vfe_acquire.event_cb = cam_ife_hw_mgr_event_handler;

		for (j = 0; j < CAM_ISP_HW_SPLIT_MAX; j++) {
		@@ -4469,7 +4473,7 @@ static int cam_ife_mgr_start_hw(void hw_mgr_priv, void start_hw_args)
		struct cam_ife_hw_mgr_ctx *ctx;
		struct cam_isp_hw_mgr_res *hw_mgr_res;
		struct cam_isp_resource_node *rsrc_node = NULL;
		uint32_t i, j, camif_debug, disable_ubwc_comp;
		uint32_t i, camif_debug;
		bool res_rdi_context_set = false;
		uint32_t primary_rdi_src_res;
		uint32_t primary_rdi_out_res;
		@@ -4543,27 +4547,6 @@ static int cam_ife_mgr_start_hw(void hw_mgr_priv, void start_hw_args)
		}
		}

		if (g_ife_hw_mgr.debug_cfg.disable_ubwc_comp) {
		disable_ubwc_comp = 1;
		for (i = 0; i < max_ife_out_res; i++) {
		hw_mgr_res = &ctx->res_list_ife_out[i];
		for (j = 0; j < CAM_ISP_HW_SPLIT_MAX; j++) {
		if (!hw_mgr_res->hw_res[i])
		continue;

		rsrc_node = hw_mgr_res->hw_res[i];
		if (rsrc_node->hw_intf->hw_ops.process_cmd) {
		rc = rsrc_node->hw_intf->hw_ops.process_cmd(
		rsrc_node->hw_intf->hw_priv,
		CAM_ISP_HW_CMD_DISABLE_UBWC_COMP,
		&disable_ubwc_comp,
		sizeof(disable_ubwc_comp));
		}
		}
		break;
		}
		}

		rc = cam_ife_hw_mgr_init_hw(ctx);
		if (rc) {
		CAM_ERR(CAM_ISP, "Init failed");

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -23,8 +23,6 @@
		#define CAM_IFE_CUSTOM_CFG_FRAME_HEADER_TS BIT(0)
		#define CAM_IFE_CUSTOM_CFG_SW_SYNC_ON BIT(1)

		#define CAM_IFE_UBWC_COMP_EN BIT(1)

		/**
		* struct cam_ife_hw_mgr_debug - contain the debug information
		*

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -133,7 +133,6 @@ enum cam_isp_hw_cmd_type {
		CAM_ISP_HW_CMD_CSID_CLOCK_DUMP,
		CAM_ISP_HW_CMD_TPG_CORE_CFG_CMD,
		CAM_ISP_HW_CMD_CSID_CHANGE_HALT_MODE,
		CAM_ISP_HW_CMD_DISABLE_UBWC_COMP,
		CAM_ISP_HW_CMD_SET_SFE_DEBUG_CFG,
		CAM_ISP_HW_CMD_QUERY_BUS_CAP,
		CAM_ISP_HW_CMD_MAX,

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_vfe_hw_intf.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -141,6 +141,7 @@ struct cam_vfe_hw_vfe_bus_rd_acquire_args {
		* (Default is Master in case of Single VFE)
		* @dual_slave_core: If Master and Slave exists, HW Index of Slave
		* @cdm_ops: CDM operations
		* @disable_ubwc_comp: Disable UBWC compression
		*/
		struct cam_vfe_hw_vfe_out_acquire_args {
		struct cam_isp_resource_node *rsrc_node;
		@@ -151,6 +152,7 @@ struct cam_vfe_hw_vfe_out_acquire_args {
		uint32_t is_master;
		uint32_t dual_slave_core;
		struct cam_cdm_utils_ops *cdm_ops;
		bool disable_ubwc_comp;
		};

		/*