Loading soc/swr-slave-port-config.h +9 −2 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static struct port_params tx_dummy[SWR_MSTR_PORT_LEN] = { static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */ {7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */ }; Loading @@ -34,7 +34,7 @@ static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = { static struct port_params tx_wcd_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */ {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */ {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */ }; Loading Loading @@ -70,6 +70,12 @@ static struct port_params tx_bottom_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 3, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ }; /* SWR DMIC1 */ static struct port_params tx_receiver_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ }; /* SWR DMIC2 */ static struct port_params tx_back_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading Loading @@ -100,6 +106,7 @@ static struct swr_dev_frame_config swrdev_frame_params_4p8MHz[] = { {tx_wcd_4p8MHz}, {tx_top_mic_4p8MHz}, {tx_back_mic_4p8MHz}, {tx_receiver_mic_4p8MHz}, {tx_bottom_mic_4p8MHz}, }; Loading Loading
soc/swr-slave-port-config.h +9 −2 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static struct port_params tx_dummy[SWR_MSTR_PORT_LEN] = { static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */ {7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */ }; Loading @@ -34,7 +34,7 @@ static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = { static struct port_params tx_wcd_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */ {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX3 */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */ {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */ }; Loading Loading @@ -70,6 +70,12 @@ static struct port_params tx_bottom_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 3, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ }; /* SWR DMIC1 */ static struct port_params tx_receiver_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ }; /* SWR DMIC2 */ static struct port_params tx_back_mic_4p8MHz[SWR_MSTR_PORT_LEN] = { {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading Loading @@ -100,6 +106,7 @@ static struct swr_dev_frame_config swrdev_frame_params_4p8MHz[] = { {tx_wcd_4p8MHz}, {tx_top_mic_4p8MHz}, {tx_back_mic_4p8MHz}, {tx_receiver_mic_4p8MHz}, {tx_bottom_mic_4p8MHz}, }; Loading