Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 26e53d5e authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s/radix: Fix preempt imbalance in TLB flush 



Fixes: 424de9c6 ("powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range")
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 158f1969

arch/powerpc/mm/tlb-radix.c

+2 −0
Original line number Diff line number Diff line
@@ -360,12 +360,14 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr) 




	pid = mm ? mm->context.id : 0;

	preempt_disable();

	if (unlikely(pid == MMU_NO_CONTEXT))

		goto no_context;



	/* 4k page size, just blow the world */

	if (PAGE_SIZE == 0x1000) {

		radix__flush_all_mm(mm);

		preempt_enable();

		return;

	}