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Commit 26b1b8d7 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-phy-T1-support' 



Andrew Lunn says:

====================
net: phy: T1 support

T1 PHYs make use of a single twisted pair, rather than the traditional
2 pair for 100BaseT or 4 pair for 1000BaseT. This patchset adds link
modes for 100BaseT1 and 1000BaseT1, and them makes use of 100BaseT1 in
the list of PHY features used by current T1 drivers.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 565d9d22 e5fb32c6

drivers/net/phy/phy-core.c

+3 −1
Original line number Diff line number Diff line
@@ -8,7 +8,7 @@ 


const char *phy_speed_to_str(int speed)

{

	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 67,

	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 69,

		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "

		"If a speed or mode has been added please update phy_speed_to_str "

		"and the PHY settings array.\n");
@@ -131,9 +131,11 @@ static const struct phy_setting settings[] = { 
	PHY_SETTING(   1000, FULL,   1000baseKX_Full		),

	PHY_SETTING(   1000, FULL,   1000baseT_Full		),

	PHY_SETTING(   1000, HALF,   1000baseT_Half		),

	PHY_SETTING(   1000, FULL,   1000baseT1_Full		),

	PHY_SETTING(   1000, FULL,   1000baseX_Full		),

	/* 100M */

	PHY_SETTING(    100, FULL,    100baseT_Full		),

	PHY_SETTING(    100, FULL,    100baseT1_Full		),

	PHY_SETTING(    100, HALF,    100baseT_Half		),

	/* 10M */

	PHY_SETTING(     10, FULL,     10baseT_Full		),

drivers/net/phy/phy_device.c

+1 −1
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@ EXPORT_SYMBOL_GPL(phy_10_100_features_array); 


const int phy_basic_t1_features_array[2] = {

	ETHTOOL_LINK_MODE_TP_BIT,

	ETHTOOL_LINK_MODE_100baseT_Full_BIT,

	ETHTOOL_LINK_MODE_100baseT1_Full_BIT,

};

EXPORT_SYMBOL_GPL(phy_basic_t1_features_array);

include/uapi/linux/ethtool.h

+2 −0
Original line number Diff line number Diff line
@@ -1483,6 +1483,8 @@ enum ethtool_link_mode_bit_indices { 
	ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,

	ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT	 = 65,

	ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT	 = 66,

	ETHTOOL_LINK_MODE_100baseT1_Full_BIT		 = 67,

	ETHTOOL_LINK_MODE_1000baseT1_Full_BIT		 = 68,



	/* must be last entry */

	__ETHTOOL_LINK_MODE_MASK_NBITS