Loading qcom/yupik.dtsi +111 −0 Original line number Diff line number Diff line Loading @@ -837,6 +837,117 @@ <WAKE_TCS 1>, <CONTROL_TCS 0>; }; tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>; }; tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; tcsr: syscon@1fc0000 { compatible = "syscon"; reg = <0x1fc0000 0x30000>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; hwlocks = <&tcsr_mutex 3>; }; qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-nsp { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-modem { compatible = "qcom,smp2p"; qcom,smem = <435>, <428>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <1>; modem_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; modem_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-wpss { compatible = "qcom,smp2p"; qcom,smem = <617>, <616>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_WPSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_WPSS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <13>; wpss_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; wpss_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; }; #include "shima-gdsc.dtsi" Loading Loading
qcom/yupik.dtsi +111 −0 Original line number Diff line number Diff line Loading @@ -837,6 +837,117 @@ <WAKE_TCS 1>, <CONTROL_TCS 0>; }; tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>; }; tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; tcsr: syscon@1fc0000 { compatible = "syscon"; reg = <0x1fc0000 0x30000>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; hwlocks = <&tcsr_mutex 3>; }; qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-nsp { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-modem { compatible = "qcom,smp2p"; qcom,smem = <435>, <428>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <1>; modem_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; modem_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-wpss { compatible = "qcom,smp2p"; qcom,smem = <617>, <616>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_WPSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_WPSS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <13>; wpss_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; wpss_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; }; #include "shima-gdsc.dtsi" Loading