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Commit 26602fe0 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable L3 interconnect driver for Shima"

parents 98b46477 7a5fc069
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+1 −2
Original line number Diff line number Diff line
@@ -2000,12 +2000,11 @@

	epss_l3_cpu: l3_cpu@18590000 {
		reg = <0x18590000 0x4000>;
		compatible = "qcom,shima-epss-l3-cpu";
		compatible = "qcom,lahaina-epss-l3-cpu";
		#interconnect-cells = <1>;
		clock-names = "xo", "alternate";
		clocks = <&rpmhcc RPMH_CXO_CLK>,
			<&gcc GCC_GPLL0>;
		status = "disabled";
	};

	llcc_pmu: llcc-pmu@9095000 {