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Commit 262d861b authored by Vadim Pasternak's avatar Vadim Pasternak Committed by Andy Shevchenko
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platform/x86: mlx-platform: Add more reset cause attributes 



Add more attributes for reset cause indication for the cases when
system reset has been caused by watchdog, BIOS reload and COMEX
thermal shutdown.

Signed-off-by: default avatarVadim Pasternak <vadimp@mellanox.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent cb636bb1

drivers/platform/x86/mlx-platform.c

+36 −0
Original line number Diff line number Diff line
@@ -1126,6 +1126,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { 
		.mask = GENMASK(7, 0) & ~BIT(6),

		.mode = 0444,

	},

	{

		.label = "reset_sff_wd",

		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(6),

		.mode = 0444,

	},

	{

		.label = "psu1_on",

		.reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
@@ -1214,6 +1220,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { 
		.mask = GENMASK(7, 0) & ~BIT(4),

		.mode = 0444,

	},

	{

		.label = "reset_from_asic",

		.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(5),

		.mode = 0444,

	},

	{

		.label = "reset_swb_wd",

		.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(6),

		.mode = 0444,

	},

	{

		.label = "reset_asic_thermal",

		.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
@@ -1226,6 +1244,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { 
		.mask = GENMASK(7, 0) & ~BIT(3),

		.mode = 0444,

	},

	{

		.label = "reset_comex_wd",

		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(6),

		.mode = 0444,

	},

	{

		.label = "reset_voltmon_upgrade_fail",

		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
@@ -1238,6 +1262,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { 
		.mask = GENMASK(7, 0) & ~BIT(1),

		.mode = 0444,

	},

	{

		.label = "reset_comex_thermal",

		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(3),

		.mode = 0444,

	},

	{

		.label = "reset_reload_bios",

		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,

		.mask = GENMASK(7, 0) & ~BIT(5),

		.mode = 0444,

	},

	{

		.label = "psu1_on",

		.reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,