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Commit 2624c1e3 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Remove unneeded parameters for the sharedmem funcs 



We do not need to pass a struct kgsl_device pointer to
kgsl_sharedmem_writel and kgsl_sharedmem_writeq which makes life slightly
easier when we don't have to worry about dereferencing pointers. The same
goes for kgsl_sharedmem_set too but that function is only used twice and
can be easily replaced by a memset() so just do that instead.

Change-Id: Ic0dedbadef4bfef8da9bf4c89a6a36e27e6f7da5
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 97554c5d

drivers/gpu/msm/adreno.c

+3 −5
Original line number Diff line number Diff line
@@ -1860,9 +1860,8 @@ static void adreno_set_active_ctxs_null(struct adreno_device *adreno_dev) 
			kgsl_context_put(&(rb->drawctxt_active->base));

		rb->drawctxt_active = NULL;



		kgsl_sharedmem_writel(KGSL_DEVICE(adreno_dev),

			rb->pagetable_desc, PT_INFO_OFFSET(current_rb_ptname),

			0);

		kgsl_sharedmem_writel(rb->pagetable_desc,

			PT_INFO_OFFSET(current_rb_ptname), 0);

	}

}
@@ -1877,8 +1876,7 @@ static int adreno_first_open(struct kgsl_device *device) 
	 */

	atomic_inc(&device->active_cnt);



	kgsl_sharedmem_set(device, device->memstore, 0, 0,

		device->memstore->size);

	memset(device->memstore->hostptr, 0, device->memstore->size);



	ret = adreno_init(device);

	if (ret)

drivers/gpu/msm/adreno.h

+4 −9
Original line number Diff line number Diff line
@@ -1464,29 +1464,24 @@ static inline bool adreno_support_64bit(struct adreno_device *adreno_dev) 
static inline void adreno_ringbuffer_set_global(

		struct adreno_device *adreno_dev, int name)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	kgsl_sharedmem_writel(device,

		adreno_dev->ringbuffers[0].pagetable_desc,

	kgsl_sharedmem_writel(adreno_dev->ringbuffers[0].pagetable_desc,

		PT_INFO_OFFSET(current_global_ptname), name);

}



static inline void adreno_ringbuffer_set_pagetable(struct adreno_ringbuffer *rb,

		struct kgsl_pagetable *pt)

{

	struct adreno_device *adreno_dev = ADRENO_RB_DEVICE(rb);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned long flags;



	spin_lock_irqsave(&rb->preempt_lock, flags);



	kgsl_sharedmem_writel(device, rb->pagetable_desc,

	kgsl_sharedmem_writel(rb->pagetable_desc,

		PT_INFO_OFFSET(current_rb_ptname), pt->name);



	kgsl_sharedmem_writeq(device, rb->pagetable_desc,

	kgsl_sharedmem_writeq(rb->pagetable_desc,

		PT_INFO_OFFSET(ttbr0), kgsl_mmu_pagetable_get_ttbr0(pt));



	kgsl_sharedmem_writel(device, rb->pagetable_desc,

	kgsl_sharedmem_writel(rb->pagetable_desc,

		PT_INFO_OFFSET(contextidr),

		kgsl_mmu_pagetable_get_contextidr(pt));

drivers/gpu/msm/adreno_a5xx_preempt.c

+18 −18
Original line number Diff line number Diff line
@@ -225,15 +225,15 @@ void a5xx_preemption_trigger(struct adreno_device *adreno_dev) 
	kgsl_sharedmem_readl(next->pagetable_desc, &contextidr,

		PT_INFO_OFFSET(contextidr));



	kgsl_sharedmem_writel(device, next->preemption_desc,

	kgsl_sharedmem_writel(next->preemption_desc,

		PREEMPT_RECORD(wptr), next->wptr);



	spin_unlock_irqrestore(&next->preempt_lock, flags);



	/* And write it to the smmu info */

	kgsl_sharedmem_writeq(device, iommu->smmu_info,

	kgsl_sharedmem_writeq(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(ttbr0), ttbr0);

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(context_idr), contextidr);



	kgsl_regwrite(device, A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO,
@@ -443,15 +443,15 @@ void a5xx_preemption_start(struct adreno_device *adreno_dev) 
	adreno_set_preempt_state(adreno_dev, ADRENO_PREEMPT_NONE);



	/* smmu_info is allocated and mapped in a5xx_preemption_iommu_init */

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(magic), A5XX_CP_SMMU_INFO_MAGIC_REF);

	kgsl_sharedmem_writeq(device, iommu->smmu_info,

	kgsl_sharedmem_writeq(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(ttbr0), MMU_DEFAULT_TTBR0(device));



	/* The CP doesn't use the asid record, so poison it */

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(asid), 0xDECAFBAD);

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(context_idr),

		MMU_DEFAULT_CONTEXTIDR(device));
@@ -466,9 +466,9 @@ void a5xx_preemption_start(struct adreno_device *adreno_dev) 
		 * preemption_desc is allocated and mapped at init time,

		 * so no need to check sharedmem_writel return value

		 */

		kgsl_sharedmem_writel(device, rb->preemption_desc,

		kgsl_sharedmem_writel(rb->preemption_desc,

			PREEMPT_RECORD(rptr), 0);

		kgsl_sharedmem_writel(device, rb->preemption_desc,

		kgsl_sharedmem_writel(rb->preemption_desc,

			PREEMPT_RECORD(wptr), 0);



		adreno_ringbuffer_set_pagetable(rb,
@@ -490,24 +490,24 @@ static int a5xx_preemption_ringbuffer_init(struct adreno_device *adreno_dev, 
	if (IS_ERR(rb->preemption_desc))

		return PTR_ERR(rb->preemption_desc);



	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(magic), A5XX_CP_CTXRECORD_MAGIC_REF);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(info), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(data), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(cntl), A5XX_CP_RB_CNTL_DEFAULT);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(rptr), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(wptr), 0);

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(rptr_addr), SCRATCH_RPTR_GPU_ADDR(device,

			rb->id));

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(rbase), rb->buffer_desc->gpuaddr);

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(counter), counteraddr);



	return 0;

drivers/gpu/msm/adreno_a6xx.c

+1 −1
Original line number Diff line number Diff line
@@ -774,7 +774,7 @@ static int a6xx_send_cp_init(struct adreno_device *adreno_dev, 
		adreno_spin_idle_debug(adreno_dev,

				"CP initialization failed to idle\n");



		kgsl_sharedmem_writel(device, device->scratch,

		kgsl_sharedmem_writel(device->scratch,

			SCRATCH_RPTR_OFFSET(rb->id), 0);

		rb->wptr = 0;

		rb->_wptr = 0;

drivers/gpu/msm/adreno_a6xx_preempt.c

+18 −22
Original line number Diff line number Diff line
@@ -260,15 +260,15 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) 
	kgsl_sharedmem_readl(next->pagetable_desc, &contextidr,

		PT_INFO_OFFSET(contextidr));



	kgsl_sharedmem_writel(device, next->preemption_desc,

	kgsl_sharedmem_writel(next->preemption_desc,

		PREEMPT_RECORD(wptr), next->wptr);



	spin_unlock_irqrestore(&next->preempt_lock, flags);



	/* And write it to the smmu info */

	kgsl_sharedmem_writeq(device, iommu->smmu_info,

	kgsl_sharedmem_writeq(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(ttbr0), ttbr0);

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(context_idr), contextidr);



	kgsl_sharedmem_readq(device->scratch, &gpuaddr,
@@ -560,15 +560,15 @@ void a6xx_preemption_start(struct adreno_device *adreno_dev) 
	adreno_set_preempt_state(adreno_dev, ADRENO_PREEMPT_NONE);



	/* smmu_info is allocated and mapped in a6xx_preemption_iommu_init */

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(magic), A6XX_CP_SMMU_INFO_MAGIC_REF);

	kgsl_sharedmem_writeq(device, iommu->smmu_info,

	kgsl_sharedmem_writeq(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(ttbr0), MMU_DEFAULT_TTBR0(device));



	/* The CP doesn't use the asid record, so poison it */

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(asid), 0xDECAFBAD);

	kgsl_sharedmem_writel(device, iommu->smmu_info,

	kgsl_sharedmem_writel(iommu->smmu_info,

		PREEMPT_SMMU_RECORD(context_idr),

		MMU_DEFAULT_CONTEXTIDR(device));
@@ -579,13 +579,9 @@ void a6xx_preemption_start(struct adreno_device *adreno_dev) 
		upper_32_bits(iommu->smmu_info->gpuaddr));



	FOR_EACH_RINGBUFFER(adreno_dev, rb, i) {

		/*

		 * preemption_desc is allocated and mapped at init time,

		 * so no need to check sharedmem_writel return value

		 */

		kgsl_sharedmem_writel(device, rb->preemption_desc,

		kgsl_sharedmem_writel(rb->preemption_desc,

			PREEMPT_RECORD(rptr), 0);

		kgsl_sharedmem_writel(device, rb->preemption_desc,

		kgsl_sharedmem_writel(rb->preemption_desc,

			PREEMPT_RECORD(wptr), 0);



		adreno_ringbuffer_set_pagetable(rb,
@@ -623,24 +619,24 @@ static int a6xx_preemption_ringbuffer_init(struct adreno_device *adreno_dev, 
	if (IS_ERR(rb->perfcounter_save_restore_desc))

		return PTR_ERR(rb->perfcounter_save_restore_desc);



	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(magic), A6XX_CP_CTXRECORD_MAGIC_REF);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(info), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(data), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(cntl), A6XX_CP_RB_CNTL_DEFAULT);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(rptr), 0);

	kgsl_sharedmem_writel(device, rb->preemption_desc,

	kgsl_sharedmem_writel(rb->preemption_desc,

		PREEMPT_RECORD(wptr), 0);

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(rptr_addr), SCRATCH_RPTR_GPU_ADDR(device,

		rb->id));

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(rbase), rb->buffer_desc->gpuaddr);

	kgsl_sharedmem_writeq(device, rb->preemption_desc,

	kgsl_sharedmem_writeq(rb->preemption_desc,

		PREEMPT_RECORD(counter), 0);



	return 0;