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Commit 25aaa75d authored by Angus Ainslie (Purism)'s avatar Angus Ainslie (Purism) Committed by Vinod Koul
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dmaengine: imx-sdma: add clock ratio 1:1 check 



On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.

Based on NXP commit MLK-16841-1 by Robin Gong <yibin.gong@nxp.com>

Signed-off-by: default avatarAngus Ainslie (Purism) <angus@akkea.ca>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 3b6679f9

drivers/dma/imx-sdma.c

+14 −4
Original line number Diff line number Diff line
@@ -440,6 +440,8 @@ struct sdma_engine { 
	unsigned int			irq;

	dma_addr_t			bd0_phys;

	struct sdma_buffer_descriptor	*bd0;

	/* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/

	bool				clk_ratio;

};



static int sdma_config_write(struct dma_chan *chan,
@@ -662,8 +664,11 @@ static int sdma_run_channel0(struct sdma_engine *sdma) 
		dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");



	/* Set bits of CONFIG register with dynamic context switching */

	if (readl(sdma->regs + SDMA_H_CONFIG) == 0)

		writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);

	reg = readl(sdma->regs + SDMA_H_CONFIG);

	if ((reg & SDMA_H_CONFIG_CSM) == 0) {

		reg |= SDMA_H_CONFIG_CSM;

		writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);

	}



	return ret;

}
@@ -1839,6 +1844,9 @@ static int sdma_init(struct sdma_engine *sdma) 
	if (ret)

		goto disable_clk_ipg;



	if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))

		sdma->clk_ratio = 1;



	/* Be sure SDMA has not started yet */

	writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
@@ -1879,7 +1887,9 @@ static int sdma_init(struct sdma_engine *sdma) 
	writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);



	/* Set bits of CONFIG register but with static context switching */

	/* FIXME: Check whether to set ACR bit depending on clock ratios */

	if (sdma->clk_ratio)

		writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);

	else

		writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);



	writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);