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Commit 250c79a8 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "dt-bindings: ufs: Add compitable string for V3 UFS PHY on SM6150"

parents 0700ac02 8bd79a44

bindings/clock/qcom,camcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@ Required properties : 
			"qcom,yupik-camcc"

			"qcom,scshrike-camcc"

			"qcom,scshrike-camcc-v2"

			"qcom,sm6150-camcc"

			"qcom,sa6155-camcc"



- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

bindings/clock/qcom,debugcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ Required properties : 
			"qcom,yupik-debugcc"

			"qcom,sdxnightjar-debugcc"

			"qcom,scshrike-debugcc"

			"qcom,sm6150-debugcc"



- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

bindings/clock/qcom,dispcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@ Required properties : 
			"qcom,yupik-dispcc"

			"qcom,scshrike-dispcc"

			"qcom,scshrike-dispcc-v2"

			"qcom,sm6150-dispcc"

			"qcom,sa6155-dispcc"



- reg : shall contain base register location and length.

- #clock-cells : from common clock binding, shall contain 1.

bindings/clock/qcom,gcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ Required properties : 
			"qcom,sdxnightjar-gcc"

			"qcom,scshrike-gcc"

			"qcom,scshrike-gcc-v2"

			"qcom,sm6150-gcc"

			"qcom,sa6155-gcc"



- reg : shall contain base register location and length

- vdd_cx-supply: The vdd_cx logic rail supply.

bindings/clock/qcom,gpucc.txt

+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ Required properties : 
		"qcom,sa8155-gpucc"

		"qcom,yupik-gpucc"

		"qcom,scshrike-gpucc"

		"qcom,sm6150-gpucc",

		"qcom,sa6155-gpucc".



- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.