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Commit 2503781c authored by Sam Shih's avatar Sam Shih Committed by Thierry Reding
Browse files

pwm: mediatek: Use pwm_mediatek as common prefix 



Use pwm_mediatek as common prefix to match the filename. No functional
change intended.

Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarSam Shih <sam.shih@mediatek.com>
Acked-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent efecdeb8

drivers/pwm/pwm-mediatek.c

+60 −57
Original line number Diff line number Diff line
@@ -35,13 +35,13 @@ 


#define PWM_CLK_DIV_MAX		7



struct mtk_pwm_platform_data {

struct pwm_mediatek_of_data {

	unsigned int num_pwms;

	bool pwm45_fixup;

};



/**

 * struct mtk_pwm_chip - struct representing PWM chip

 * struct pwm_mediatek_chip - struct representing PWM chip

 * @chip: linux PWM chip representation

 * @regs: base address of PWM chip

 * @clk_top: the top clock generator
@@ -49,27 +49,29 @@ struct mtk_pwm_platform_data { 
 * @clk_pwms: the clock used by each PWM channel

 * @clk_freq: the fix clock frequency of legacy MIPS SoC

 */

struct mtk_pwm_chip {

struct pwm_mediatek_chip {

	struct pwm_chip chip;

	void __iomem *regs;

	struct clk *clk_top;

	struct clk *clk_main;

	struct clk **clk_pwms;

	const struct mtk_pwm_platform_data *soc;

	const struct pwm_mediatek_of_data *soc;

};



static const unsigned int mtk_pwm_reg_offset[] = {

static const unsigned int pwm_mediatek_reg_offset[] = {

	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220

};



static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)

static inline struct pwm_mediatek_chip *

to_pwm_mediatek_chip(struct pwm_chip *chip)

{

	return container_of(chip, struct mtk_pwm_chip, chip);

	return container_of(chip, struct pwm_mediatek_chip, chip);

}



static int mtk_pwm_clk_enable(struct pwm_chip *chip, struct pwm_device *pwm)

static int pwm_mediatek_clk_enable(struct pwm_chip *chip,

				   struct pwm_device *pwm)

{

	struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);

	struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);

	int ret;



	ret = clk_prepare_enable(pc->clk_top);
@@ -94,45 +96,46 @@ static int mtk_pwm_clk_enable(struct pwm_chip *chip, struct pwm_device *pwm) 
	return ret;

}



static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm)

static void pwm_mediatek_clk_disable(struct pwm_chip *chip,

				     struct pwm_device *pwm)

{

	struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);

	struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);



	clk_disable_unprepare(pc->clk_pwms[pwm->hwpwm]);

	clk_disable_unprepare(pc->clk_main);

	clk_disable_unprepare(pc->clk_top);

}



static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,

				unsigned int offset)

static inline u32 pwm_mediatek_readl(struct pwm_mediatek_chip *chip,

				     unsigned int num, unsigned int offset)

{

	return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);

	return readl(chip->regs + pwm_mediatek_reg_offset[num] + offset);

}



static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,

static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,

				       unsigned int num, unsigned int offset,

				       u32 value)

{

	writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);

	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);

}



static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,

static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,

			       int duty_ns, int period_ns)

{

	struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);

	struct clk *clk = pc->clk_pwms[pwm->hwpwm];

	struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);

	u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH,

	    reg_thres = PWMTHRES;

	u64 resolution;

	int ret;



	ret = mtk_pwm_clk_enable(chip, pwm);

	ret = pwm_mediatek_clk_enable(chip, pwm);



	if (ret < 0)

		return ret;



	/* Using resolution in picosecond gets accuracy higher */

	resolution = (u64)NSEC_PER_SEC * 1000;

	do_div(resolution, clk_get_rate(clk));

	do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));



	cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution);

	while (cnt_period > 8191) {
@@ -143,7 +146,7 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
	}



	if (clkdiv > PWM_CLK_DIV_MAX) {

		mtk_pwm_clk_disable(chip, pwm);

		pwm_mediatek_clk_disable(chip, pwm);

		dev_err(chip->dev, "period %d not supported\n", period_ns);

		return -EINVAL;

	}
@@ -158,22 +161,22 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
	}



	cnt_duty = DIV_ROUND_CLOSEST_ULL((u64)duty_ns * 1000, resolution);

	mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);

	mtk_pwm_writel(pc, pwm->hwpwm, reg_width, cnt_period);

	mtk_pwm_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);

	pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);

	pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);

	pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);



	mtk_pwm_clk_disable(chip, pwm);

	pwm_mediatek_clk_disable(chip, pwm);



	return 0;

}



static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)

static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)

{

	struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);

	struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);

	u32 value;

	int ret;



	ret = mtk_pwm_clk_enable(chip, pwm);

	ret = pwm_mediatek_clk_enable(chip, pwm);

	if (ret < 0)

		return ret;
@@ -184,28 +187,28 @@ static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 
	return 0;

}



static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)

static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)

{

	struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);

	struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);

	u32 value;



	value = readl(pc->regs);

	value &= ~BIT(pwm->hwpwm);

	writel(value, pc->regs);



	mtk_pwm_clk_disable(chip, pwm);

	pwm_mediatek_clk_disable(chip, pwm);

}



static const struct pwm_ops mtk_pwm_ops = {

	.config = mtk_pwm_config,

	.enable = mtk_pwm_enable,

	.disable = mtk_pwm_disable,

static const struct pwm_ops pwm_mediatek_ops = {

	.config = pwm_mediatek_config,

	.enable = pwm_mediatek_enable,

	.disable = pwm_mediatek_disable,

	.owner = THIS_MODULE,

};



static int mtk_pwm_probe(struct platform_device *pdev)

static int pwm_mediatek_probe(struct platform_device *pdev)

{

	struct mtk_pwm_chip *pc;

	struct pwm_mediatek_chip *pc;

	struct resource *res;

	unsigned int i;

	int ret;
@@ -256,7 +259,7 @@ static int mtk_pwm_probe(struct platform_device *pdev) 
	platform_set_drvdata(pdev, pc);



	pc->chip.dev = &pdev->dev;

	pc->chip.ops = &mtk_pwm_ops;

	pc->chip.ops = &pwm_mediatek_ops;

	pc->chip.base = -1;

	pc->chip.npwm = pc->soc->num_pwms;
@@ -269,39 +272,39 @@ static int mtk_pwm_probe(struct platform_device *pdev) 
	return 0;

}



static int mtk_pwm_remove(struct platform_device *pdev)

static int pwm_mediatek_remove(struct platform_device *pdev)

{

	struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);

	struct pwm_mediatek_chip *pc = platform_get_drvdata(pdev);



	return pwmchip_remove(&pc->chip);

}



static const struct mtk_pwm_platform_data mt2712_pwm_data = {

static const struct pwm_mediatek_of_data mt2712_pwm_data = {

	.num_pwms = 8,

	.pwm45_fixup = false,

};



static const struct mtk_pwm_platform_data mt7622_pwm_data = {

static const struct pwm_mediatek_of_data mt7622_pwm_data = {

	.num_pwms = 6,

	.pwm45_fixup = false,

};



static const struct mtk_pwm_platform_data mt7623_pwm_data = {

static const struct pwm_mediatek_of_data mt7623_pwm_data = {

	.num_pwms = 5,

	.pwm45_fixup = true,

};



static const struct mtk_pwm_platform_data mt7628_pwm_data = {

static const struct pwm_mediatek_of_data mt7628_pwm_data = {

	.num_pwms = 4,

	.pwm45_fixup = true,

};



static const struct mtk_pwm_platform_data mt8516_pwm_data = {

static const struct pwm_mediatek_of_data mt8516_pwm_data = {

	.num_pwms = 5,

	.pwm45_fixup = false,

};



static const struct of_device_id mtk_pwm_of_match[] = {

static const struct of_device_id pwm_mediatek_of_match[] = {

	{ .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },

	{ .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },

	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
@@ -309,17 +312,17 @@ static const struct of_device_id mtk_pwm_of_match[] = { 
	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },

	{ },

};

MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);

MODULE_DEVICE_TABLE(of, pwm_mediatek_of_match);



static struct platform_driver mtk_pwm_driver = {

static struct platform_driver pwm_mediatek_driver = {

	.driver = {

		.name = "mtk-pwm",

		.of_match_table = mtk_pwm_of_match,

		.name = "pwm-mediatek",

		.of_match_table = pwm_mediatek_of_match,

	},

	.probe = mtk_pwm_probe,

	.remove = mtk_pwm_remove,

	.probe = pwm_mediatek_probe,

	.remove = pwm_mediatek_remove,

};

module_platform_driver(mtk_pwm_driver);

module_platform_driver(pwm_mediatek_driver);



MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");

MODULE_LICENSE("GPL");