Loading qcom/shima.dtsi +122 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/spmi/spmi.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> Loading Loading @@ -1178,6 +1179,127 @@ qcom,ee = <0>; }; spmi_debug_bus: qcom,spmi-debug@6b12000 { compatible = "qcom,spmi-pmic-arb-debug"; reg = <0x6b12000 0x60>, <0x7820b0 0x4>; reg-names = "core", "fuse"; clocks = <&aopcc QDSS_CLK>; clock-names = "core_clk"; qcom,fuse-disable-bit = <24>; #address-cells = <2>; #size-cells = <0>; status = "disabled"; qcom,pmk8350-debug@0 { compatible = "qcom,spmi-pmic"; reg = <0 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350-debug@1 { compatible = "qcom,spmi-pmic"; reg = <1 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350c-debug@2 { compatible = "qcom,spmi-pmic"; reg = <2 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350b-debug@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pmr735b-debug@5 { compatible = "qcom,spmi-pmic"; reg = <5 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; }; qcom,pmic_glink { compatible = "qcom,pmic-glink"; qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS"; qcom,subsys-name = "adsp"; qcom,protection-domain = "tms/servreg", "msm/adsp/charger_pd"; battery_charger: qcom,battery_charger { compatible = "qcom,battery-charger"; }; qcom,ucsi { compatible = "qcom,ucsi-glink"; }; altmode: qcom,altmode { compatible = "qcom,altmode-glink"; #altmode-cells = <1>; }; }; qcom,pmic_glink_log { compatible = "qcom,pmic-glink"; qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS"; qcom,battery_debug { compatible = "qcom,battery-debug"; }; spmi_glink_debug: qcom,spmi_glink_debug { compatible = "qcom,spmi-glink-debug"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; /* Primary SPMI bus */ spmi@0 { reg = <0>; #address-cells = <2>; #size-cells = <0>; qcom,pm8350b-debug@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; qcom,can-sleep; }; }; /* Secondary (QUP) SPMI bus */ spmi@1 { reg = <1>; #address-cells = <2>; #size-cells = <0>; qcom,smb1394-debug@b { compatible = "qcom,spmi-pmic"; reg = <11 SPMI_USID>; qcom,can-sleep; }; qcom,smb1394-debug@c { compatible = "qcom,spmi-pmic"; reg = <12 SPMI_USID>; qcom,can-sleep; }; }; }; }; qcom,chd { compatible = "qcom,core-hang-detect"; label = "core"; Loading Loading
qcom/shima.dtsi +122 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/spmi/spmi.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> Loading Loading @@ -1178,6 +1179,127 @@ qcom,ee = <0>; }; spmi_debug_bus: qcom,spmi-debug@6b12000 { compatible = "qcom,spmi-pmic-arb-debug"; reg = <0x6b12000 0x60>, <0x7820b0 0x4>; reg-names = "core", "fuse"; clocks = <&aopcc QDSS_CLK>; clock-names = "core_clk"; qcom,fuse-disable-bit = <24>; #address-cells = <2>; #size-cells = <0>; status = "disabled"; qcom,pmk8350-debug@0 { compatible = "qcom,spmi-pmic"; reg = <0 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350-debug@1 { compatible = "qcom,spmi-pmic"; reg = <1 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350c-debug@2 { compatible = "qcom,spmi-pmic"; reg = <2 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pm8350b-debug@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; qcom,pmr735b-debug@5 { compatible = "qcom,spmi-pmic"; reg = <5 SPMI_USID>; #address-cells = <2>; #size-cells = <0>; qcom,can-sleep; }; }; qcom,pmic_glink { compatible = "qcom,pmic-glink"; qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS"; qcom,subsys-name = "adsp"; qcom,protection-domain = "tms/servreg", "msm/adsp/charger_pd"; battery_charger: qcom,battery_charger { compatible = "qcom,battery-charger"; }; qcom,ucsi { compatible = "qcom,ucsi-glink"; }; altmode: qcom,altmode { compatible = "qcom,altmode-glink"; #altmode-cells = <1>; }; }; qcom,pmic_glink_log { compatible = "qcom,pmic-glink"; qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS"; qcom,battery_debug { compatible = "qcom,battery-debug"; }; spmi_glink_debug: qcom,spmi_glink_debug { compatible = "qcom,spmi-glink-debug"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; /* Primary SPMI bus */ spmi@0 { reg = <0>; #address-cells = <2>; #size-cells = <0>; qcom,pm8350b-debug@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; qcom,can-sleep; }; }; /* Secondary (QUP) SPMI bus */ spmi@1 { reg = <1>; #address-cells = <2>; #size-cells = <0>; qcom,smb1394-debug@b { compatible = "qcom,spmi-pmic"; reg = <11 SPMI_USID>; qcom,can-sleep; }; qcom,smb1394-debug@c { compatible = "qcom,spmi-pmic"; reg = <12 SPMI_USID>; qcom,can-sleep; }; }; }; }; qcom,chd { compatible = "qcom,core-hang-detect"; label = "core"; Loading