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Commit 2483f859 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "qseecom: Add qseecom driver snapshot for Lahaina"

parents 588d9a8b f9bafc3a

drivers/misc/Kconfig

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@@ -481,6 +481,14 @@ config PVPANIC 
	  a paravirtualized device provided by QEMU; it lets a virtual machine

	  (guest) communicate panic events to the host.



config QSEECOM

        tristate "QTI Secure Execution Communicator driver"

        help

          Provides a communication interface between userspace and

          QTI Secure Execution Environment (QSEE) using Secure Channel

          Manager (SCM) interface. It exposes APIs for both userspace and

          kernel clients.



source "drivers/misc/c2port/Kconfig"

source "drivers/misc/eeprom/Kconfig"

source "drivers/misc/cb710/Kconfig"

drivers/misc/Makefile

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@@ -58,3 +58,4 @@ obj-$(CONFIG_PVPANIC) += pvpanic.o 
obj-$(CONFIG_HABANA_AI)		+= habanalabs/

obj-$(CONFIG_XILINX_SDFEC)	+= xilinx_sdfec.o

obj-$(CONFIG_UID_SYS_STATS)	+= uid_sys_stats.o

obj-$(CONFIG_QSEECOM)           += qseecom.o

drivers/misc/qseecom.c

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File added.

Preview size limit exceeded, changes collapsed.

drivers/misc/qseecom_kernel.h

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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.

 */



#ifndef __QSEECOM_KERNEL_H_

#define __QSEECOM_KERNEL_H_



#include <linux/types.h>



#define QSEECOM_ALIGN_SIZE	0x40

#define QSEECOM_ALIGN_MASK	(QSEECOM_ALIGN_SIZE - 1)

#define QSEECOM_ALIGN(x)	\

	((x + QSEECOM_ALIGN_MASK) & (~QSEECOM_ALIGN_MASK))



/*

 * struct qseecom_handle -

 *      Handle to the qseecom device for kernel clients

 * @sbuf - shared buffer pointer

 * @sbbuf_len - shared buffer size

 */

struct qseecom_handle {

	void *dev; /* in/out */

	unsigned char *sbuf; /* in/out */

	uint32_t sbuf_len; /* in/out */

};



int qseecom_start_app(struct qseecom_handle **handle,

						char *app_name, uint32_t size);

int qseecom_shutdown_app(struct qseecom_handle **handle);

int qseecom_send_command(struct qseecom_handle *handle, void *send_buf,

			uint32_t sbuf_len, void *resp_buf, uint32_t rbuf_len);

int qseecom_set_bandwidth(struct qseecom_handle *handle, bool high);

int qseecom_process_listener_from_smcinvoke(struct scm_desc *desc);



#endif /* __QSEECOM_KERNEL_H_ */

include/crypto/ice.h

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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.

 */



#ifndef _QCOM_INLINE_CRYPTO_ENGINE_H_

#define _QCOM_INLINE_CRYPTO_ENGINE_H_



#include <linux/platform_device.h>

#include <linux/cdev.h>



struct request;



enum ice_cryto_algo_mode {

	ICE_CRYPTO_ALGO_MODE_AES_ECB = 0x0,

	ICE_CRYPTO_ALGO_MODE_AES_XTS = 0x3,

};



enum ice_crpto_key_size {

	ICE_CRYPTO_KEY_SIZE_128 = 0x0,

	ICE_CRYPTO_KEY_SIZE_256 = 0x2,

};



enum ice_crpto_key_mode {

	ICE_CRYPTO_USE_KEY0_HW_KEY = 0x0,

	ICE_CRYPTO_USE_KEY1_HW_KEY = 0x1,

	ICE_CRYPTO_USE_LUT_SW_KEY0 = 0x2,

	ICE_CRYPTO_USE_LUT_SW_KEY  = 0x3

};



#define QCOM_ICE_TYPE_NAME_LEN 8



typedef void (*ice_error_cb)(void *, u32 error);



struct qcom_ice_bus_vote {

	uint32_t client_handle;

	uint32_t curr_vote;

	int min_bw_vote;

	int max_bw_vote;

	int saved_vote;

	bool is_max_bw_needed;

	struct device_attribute max_bus_bw;

};



/*

 * ICE HW device structure.

 */

struct ice_device {

	struct list_head	list;

	struct device		*pdev;

	struct cdev		cdev;

	dev_t			device_no;

	struct class		*driver_class;

	void __iomem		*mmio;

	struct resource		*res;

	int			irq;

	bool			is_ice_enabled;

	bool			is_ice_disable_fuse_blown;

	ice_error_cb		error_cb;

	void			*host_controller_data; /* UFS/EMMC/other? */

	struct list_head	clk_list_head;

	u32			ice_hw_version;

	bool			is_ice_clk_available;

	char			ice_instance_type[QCOM_ICE_TYPE_NAME_LEN];

	struct regulator	*reg;

	bool			is_regulator_available;

	struct qcom_ice_bus_vote bus_vote;

	ktime_t			ice_reset_start_time;

	ktime_t			ice_reset_complete_time;

	void             *key_table;

};



struct ice_crypto_setting {

	enum ice_crpto_key_size		key_size;

	enum ice_cryto_algo_mode	algo_mode;

	enum ice_crpto_key_mode		key_mode;

	short				key_index;



};



struct ice_data_setting {

	struct ice_crypto_setting	crypto_data;

	bool				sw_forced_context_switch;

	bool				decr_bypass;

	bool				encr_bypass;

};



/* MSM ICE Crypto Data Unit of target DUN of Transfer Request */

enum ice_crypto_data_unit {

	ICE_CRYPTO_DATA_UNIT_512_B          = 0,

	ICE_CRYPTO_DATA_UNIT_1_KB           = 1,

	ICE_CRYPTO_DATA_UNIT_2_KB           = 2,

	ICE_CRYPTO_DATA_UNIT_4_KB           = 3,

	ICE_CRYPTO_DATA_UNIT_8_KB           = 4,

	ICE_CRYPTO_DATA_UNIT_16_KB          = 5,

	ICE_CRYPTO_DATA_UNIT_32_KB          = 6,

	ICE_CRYPTO_DATA_UNIT_64_KB          = 7,

};



struct qcom_ice_variant_ops *qcom_ice_get_variant_ops(struct device_node *node);

struct platform_device *qcom_ice_get_pdevice(struct device_node *node);



#if IS_ENABLED(CONFIG_CYRPTO_DEV_QCOM_ICE)

int enable_ice_setup(struct ice_device *ice_dev);

int disable_ice_setup(struct ice_device *ice_dev);

int qcom_ice_setup_ice_hw(const char *storage_type, int enable);

void qcom_ice_set_fde_flag(int flag);

struct list_head *get_ice_dev_list(void);

#else

static inline int enable_ice_setup(struct ice_device *ice_dev)

{

	return 0;

}

static inline int disable_ice_setup(struct ice_device *ice_dev)

{

	return 0;

}

static inline int qcom_ice_setup_ice_hw(const char *storage_type, int enable)

{

	return 0;

}

static inline void qcom_ice_set_fde_flag(int flag) {}

static inline struct list_head *get_ice_dev_list(void)

{

	return NULL;

}

#endif



struct qcom_ice_variant_ops {

	const char *name;

	int	(*init)(struct platform_device *device_init, void *init_data,

				ice_error_cb err);

	int	(*reset)(struct platform_device *device_reset);

	int	(*resume)(struct platform_device *device_resume);

	int	(*suspend)(struct platform_device *device_suspend);

	int	(*config_start)(struct platform_device *device_start,

			struct request *req, struct ice_data_setting *setting,

			bool start);

	int	(*config_end)(struct platform_device *pdev,

			struct request *req);

	int	(*status)(struct platform_device *device_status);

	void	(*debug)(struct platform_device *device_debug);

};



#endif /* _QCOM_INLINE_CRYPTO_ENGINE_H_ */