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Commit 243880b4 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "disp: msm: sde: add on/off and payload size logging for LUTDMA"

parents a5857a5b 6a171862

msm/sde/sde_hw_reg_dma_v1.c

+9 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.

 */



#include <linux/iopoll.h>
@@ -685,8 +685,14 @@ static int write_kick_off_v1(struct sde_reg_dma_kickoff_cfg *cfg) 
		}

	}



	SDE_EVT32(cfg->feature, cfg->dma_type, cfg->dma_buf, cfg->op,

			cfg->queue_select, cfg->ctl->idx);

	SDE_EVT32(cfg->feature, cfg->dma_type,

			((uint64_t)cfg->dma_buf) >> 32,

			((uint64_t)cfg->dma_buf) & 0xFFFFFFFF,

			(cfg->dma_buf->iova) >> 32,

			(cfg->dma_buf->iova) & 0xFFFFFFFF,

			cfg->op,

			cfg->queue_select, cfg->ctl->idx,

			SIZE_DWORD(cfg->dma_buf->index));

	return 0;

}

msm/sde/sde_hw_reg_dma_v1_color_proc.c

+61 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.

 */



#include <drm/msm_drm_pp.h>
@@ -115,6 +115,9 @@ 


#define REG_DMA_DSPP_GAMUT_OP_MASK 0xFFFFFFE0



#define LOG_FEATURE_OFF SDE_EVT32(ctx->idx, 0)

#define LOG_FEATURE_ON SDE_EVT32(ctx->idx, 1)



enum ltm_vlut_ops_bitmask {

	ltm_unsharp = BIT(0),

	ltm_dither = BIT(1),
@@ -500,6 +503,7 @@ void reg_dmav1_setup_dspp_vlutv18(struct sde_hw_dspp *ctx, void *cfg) 
		struct sde_hw_dspp *dspp;



		DRM_DEBUG_DRIVER("Disable vlut feature\n");

		LOG_FEATURE_OFF;

		for (index = 0; index < num_of_mixers; index++) {

			dspp = hw_cfg->dspp[index];

			SDE_REG_WRITE(&dspp->hw, dspp->cap->sblk->hist.base +
@@ -566,6 +570,7 @@ void reg_dmav1_setup_dspp_vlutv18(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[VLUT][ctx->idx],

	    REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, VLUT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -713,6 +718,7 @@ static void reg_dmav1_setup_dspp_3d_gamutv4_common(struct sde_hw_dspp *ctx, 
	op_mode = SDE_REG_READ(&ctx->hw, ctx->cap->sblk->gamut.base);

	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable gamut feature\n");

		LOG_FEATURE_OFF;

		dspp_3d_gamutv4_off(ctx, cfg);

		return;

	}
@@ -805,6 +811,7 @@ static void reg_dmav1_setup_dspp_3d_gamutv4_common(struct sde_hw_dspp *ctx, 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[GAMUT][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, GAMUT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -881,6 +888,7 @@ void reg_dmav1_setup_dspp_gcv18(struct sde_hw_dspp *ctx, void *cfg) 


	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable pgc feature\n");

		LOG_FEATURE_OFF;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->gc.base, 0);

		return;

	}
@@ -963,6 +971,7 @@ void reg_dmav1_setup_dspp_gcv18(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[GC][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, GC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1038,6 +1047,7 @@ void reg_dmav1_setup_dspp_igcv31(struct sde_hw_dspp *ctx, void *cfg) 


	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable igc feature\n");

		LOG_FEATURE_OFF;

		_dspp_igcv31_off(ctx, cfg);

		return;

	}
@@ -1140,6 +1150,7 @@ void reg_dmav1_setup_dspp_igcv31(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[IGC][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, IGC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1217,6 +1228,7 @@ int reg_dmav1_setup_rc_datav1(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

		dspp_buf[RC_DATA][ctx->idx], REG_DMA_WRITE,

		DMA_CTL_QUEUE0, WRITE_TRIGGER, RC_DATA);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1295,6 +1307,7 @@ void reg_dmav1_setup_dspp_pcc_common(struct sde_hw_dspp *ctx, void *cfg) 


	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable pcc feature\n");

		LOG_FEATURE_OFF;

		_dspp_pcc_common_off(ctx, cfg);

		return;

	}
@@ -1392,6 +1405,7 @@ void reg_dmav1_setup_dspp_pcc_common(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[PCC][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, PCC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1450,6 +1464,7 @@ void reg_dmav1_setup_dspp_pa_hsicv17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -1576,6 +1591,7 @@ void reg_dmav1_setup_dspp_pa_hsicv17(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[HSIC][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, HSIC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1607,6 +1623,7 @@ void reg_dmav1_setup_dspp_sixzonev17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -1731,6 +1748,7 @@ void reg_dmav1_setup_dspp_sixzonev17(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

		dspp_buf[SIX_ZONE][ctx->idx],

		REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE, SIX_ZONE);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -1927,6 +1945,7 @@ void reg_dmav1_setup_dspp_memcol_skinv17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -1936,6 +1955,7 @@ void reg_dmav1_setup_dspp_memcol_skinv17(struct sde_hw_dspp *ctx, void *cfg) 
		return;

	}



	LOG_FEATURE_ON;

	__setup_dspp_memcol(ctx, MEMC_SKIN, hw_cfg);

}
@@ -1962,6 +1982,7 @@ void reg_dmav1_setup_dspp_memcol_skyv17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -1971,6 +1992,7 @@ void reg_dmav1_setup_dspp_memcol_skyv17(struct sde_hw_dspp *ctx, void *cfg) 
		return;

	}



	LOG_FEATURE_ON;

	__setup_dspp_memcol(ctx, MEMC_SKY, hw_cfg);

}
@@ -1997,6 +2019,7 @@ void reg_dmav1_setup_dspp_memcol_folv17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -2006,6 +2029,7 @@ void reg_dmav1_setup_dspp_memcol_folv17(struct sde_hw_dspp *ctx, void *cfg) 
		return;

	}



	LOG_FEATURE_ON;

	__setup_dspp_memcol(ctx, MEMC_FOLIAGE, hw_cfg);

}
@@ -2036,6 +2060,7 @@ void reg_dmav1_setup_dspp_memcol_protv17(struct sde_hw_dspp *ctx, void *cfg) 
		if (PA_DISABLE_REQUIRED(opcode))

			opcode &= ~PA_EN;

		SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->hsic.base, opcode);

		LOG_FEATURE_OFF;

		return;

	}
@@ -2094,6 +2119,7 @@ void reg_dmav1_setup_dspp_memcol_protv17(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			dspp_buf[MEMC_PROT][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, MEMC_PROT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -2242,6 +2268,7 @@ void reg_dmav1_setup_vig_gamutv5(struct sde_hw_pipe *ctx, void *cfg) 
	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable gamut feature\n");

		/* v5 and v6 call the same off version */

		LOG_FEATURE_OFF;

		vig_gamutv5_off(ctx, cfg);

		return;

	}
@@ -2328,6 +2355,7 @@ void reg_dmav1_setup_vig_gamutv5(struct sde_hw_pipe *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][GAMUT][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, GAMUT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -2480,6 +2508,7 @@ void reg_dmav1_setup_vig_igcv5(struct sde_hw_pipe *ctx, void *cfg) 
	igc_lut = hw_cfg->payload;

	if (!igc_lut) {

		DRM_DEBUG_DRIVER("disable igc feature\n");

		LOG_FEATURE_OFF;

		vig_igcv5_off(ctx, hw_cfg);

		return;

	}
@@ -2507,6 +2536,7 @@ void reg_dmav1_setup_vig_igcv5(struct sde_hw_pipe *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][IGC][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, IGC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -2530,6 +2560,7 @@ void reg_dmav1_setup_vig_igcv6(struct sde_hw_pipe *ctx, void *cfg) 
	igc_lut = hw_cfg->payload;

	if (!igc_lut) {

		DRM_DEBUG_DRIVER("disable igc feature\n");

		LOG_FEATURE_OFF;

		/* Both v5 and v6 call same igcv5_off */

		vig_igcv5_off(ctx, hw_cfg);

		return;
@@ -2567,6 +2598,7 @@ void reg_dmav1_setup_vig_igcv6(struct sde_hw_pipe *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][IGC][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, IGC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -2638,6 +2670,7 @@ void reg_dmav1_setup_dma_igcv5(struct sde_hw_pipe *ctx, void *cfg, 
	igc_lut = hw_cfg->payload;

	if (!igc_lut) {

		DRM_DEBUG_DRIVER("disable igc feature\n");

		LOG_FEATURE_OFF;

		dma_igcv5_off(ctx, cfg, idx);

		return;

	}
@@ -2718,6 +2751,7 @@ void reg_dmav1_setup_dma_igcv5(struct sde_hw_pipe *ctx, void *cfg, 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][IGC][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, IGC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -2790,6 +2824,7 @@ void reg_dmav1_setup_dma_gcv5(struct sde_hw_pipe *ctx, void *cfg, 
	gc_lut = hw_cfg->payload;

	if (!gc_lut) {

		DRM_DEBUG_DRIVER("disable gc feature\n");

		LOG_FEATURE_OFF;

		dma_gcv5_off(ctx, cfg, idx);

		return;

	}
@@ -2845,6 +2880,7 @@ void reg_dmav1_setup_dma_gcv5(struct sde_hw_pipe *ctx, void *cfg, 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][GC][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, GC);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -3111,8 +3147,12 @@ void reg_dmav1_setup_vig_qseed3(struct sde_hw_pipe *ctx, 
		return;

	}



	if (!scaler3_cfg->enable)

	if (!scaler3_cfg->enable) {

		LOG_FEATURE_OFF;

		goto end;

	} else {

		LOG_FEATURE_ON;

	}



	op_mode = BIT(0);

	op_mode |= (scaler3_cfg->y_rgb_filter_cfg & 0x3) << 16;
@@ -3457,6 +3497,7 @@ void reg_dmav1_setup_ltm_initv1(struct sde_hw_dspp *ctx, void *cfg) 
	/* disable case */

	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("Disable LTM init feature\n");

		LOG_FEATURE_OFF;

		ltm_initv1_disable(ctx, cfg, num_mixers, dspp_idx);

		return;

	}
@@ -3560,6 +3601,7 @@ void reg_dmav1_setup_ltm_initv1(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, ltm_buf[LTM_INIT][idx],

				REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,

				LTM_INIT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -3650,6 +3692,7 @@ void reg_dmav1_setup_ltm_roiv1(struct sde_hw_dspp *ctx, void *cfg) 
	/* disable case */

	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("Disable LTM roi feature\n");

		LOG_FEATURE_OFF;

		ltm_roiv1_disable(ctx, cfg, num_mixers, dspp_idx);

		return;

	}
@@ -3736,6 +3779,7 @@ void reg_dmav1_setup_ltm_roiv1(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, ltm_buf[LTM_ROI][idx],

				REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,

				LTM_ROI);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -3785,6 +3829,7 @@ void reg_dmav1_setup_ltm_vlutv1(struct sde_hw_dspp *ctx, void *cfg) 
	/* disable case */

	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("Disable LTM vlut feature\n");

		LOG_FEATURE_OFF;

		ltm_vlutv1_disable(ctx);

		return;

	}
@@ -3886,6 +3931,7 @@ void reg_dmav1_setup_ltm_vlutv1(struct sde_hw_dspp *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, ltm_buf[LTM_VLUT][idx],

				REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,

				LTM_VLUT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -4029,6 +4075,7 @@ void reg_dmav2_setup_dspp_igcv4(struct sde_hw_dspp *ctx, void *cfg) 


	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable igc feature\n");

		LOG_FEATURE_OFF;

		_dspp_igcv4_off(ctx, cfg);

		return;

	}
@@ -4116,6 +4163,7 @@ void reg_dmav2_setup_dspp_igcv4(struct sde_hw_dspp *ctx, void *cfg) 
		goto exit;

	}



	LOG_FEATURE_ON;

	_perform_sbdma_kickoff(ctx, hw_cfg, dma_ops, blk, IGC);



exit:
@@ -4182,6 +4230,7 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg) 


	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable gamut feature\n");

		LOG_FEATURE_OFF;

		dspp_3d_gamutv43_off(ctx, cfg);

		return;

	}
@@ -4310,6 +4359,7 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg) 
		goto exit;

	}



	LOG_FEATURE_ON;

	_perform_sbdma_kickoff(ctx, hw_cfg, dma_ops, blk, GAMUT);



exit:
@@ -4338,6 +4388,7 @@ void reg_dmav2_setup_vig_gamutv61(struct sde_hw_pipe *ctx, void *cfg) 
	if (!hw_cfg->payload) {

		DRM_DEBUG_DRIVER("disable gamut feature\n");

		/* v5 and v6 call the same off version */

		LOG_FEATURE_OFF;

		vig_gamutv5_off(ctx, cfg);

		return;

	}
@@ -4449,6 +4500,7 @@ void reg_dmav2_setup_vig_gamutv61(struct sde_hw_pipe *ctx, void *cfg) 
	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl,

			sspp_buf[idx][GAMUT][ctx->idx], REG_DMA_WRITE,

			DMA_CTL_QUEUE0, WRITE_IMMEDIATE, GAMUT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -4592,8 +4644,10 @@ void reg_dmav1_setup_spr_init_cfgv1(struct sde_hw_dspp *ctx, void *cfg) 
	if (rc)

		return;



	if (!hw_cfg->payload)

	if (!hw_cfg->payload) {

		LOG_FEATURE_OFF;

		return reg_dmav1_disable_spr(ctx, cfg);

	}



	if (hw_cfg->len != sizeof(struct drm_msm_spr_init_cfg)) {

		DRM_ERROR("invalid payload size len %d exp %zd\n", hw_cfg->len,
@@ -4710,6 +4764,7 @@ void reg_dmav1_setup_spr_init_cfgv1(struct sde_hw_dspp *ctx, void *cfg) 
			dspp_buf[SPR_INIT][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,

			SPR_INIT);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -4777,6 +4832,7 @@ void reg_dmav1_setup_spr_pu_cfgv1(struct sde_hw_dspp *ctx, void *cfg) 
			dspp_buf[SPR_PU_CFG][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,

			SPR_PU_CFG);

	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -5266,6 +5322,7 @@ void reg_dmav1_setup_demurav1(struct sde_hw_dspp *ctx, void *cfx) 
		return;



	if (!hw_cfg->payload) {

		LOG_FEATURE_OFF;

		reg_dma_demura_off(ctx, hw_cfg);

		return;

	}
@@ -5328,7 +5385,7 @@ void reg_dmav1_setup_demurav1(struct sde_hw_dspp *ctx, void *cfx) 


	DRM_DEBUG("enable demura buffer size %d\n",

				dspp_buf[DEMURA_CFG][ctx->idx]->index);



	LOG_FEATURE_ON;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);