Commit 23d57b99 authored Feb 23, 2024 by Jerome Brunet Committed by Sasha Levin Mar 26, 2024

ASoC: meson: axg-tdm-interface: fix mclk setup without mclk-fs



[ Upstream commit e3741a8d28a1137f8b19ae6f3d6e3be69a454a0a ]

By default, when mclk-fs is not provided, the tdm-interface driver
requests an MCLK that is 4x the bit clock, SCLK.

However there is no justification for this:

* If the codec needs MCLK for its operation, mclk-fs is expected to be set
  according to the codec requirements.
* If the codec does not need MCLK the minimum is 2 * SCLK, because this is
  minimum the divider between SCLK and MCLK can do.

Multiplying by 4 may cause problems because the PLL limit may be reached
sooner than it should, so use 2x instead.

Fixes: d60e4f1e ("ASoC: meson: add tdm interface driver")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://msgid.link/r/20240223175116.2005407-2-jbrunet@baylibre.com


Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent 8df143c6

sound/soc/meson/axg-tdm-interface.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -266,8 +266,8 @@ static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai,
		srate = iface->slots * iface->slot_width * params_rate(params);

		if (!iface->mclk_rate) {
		/* If no specific mclk is requested, default to bit clock * 4 */
		clk_set_rate(iface->mclk, 4 * srate);
		/* If no specific mclk is requested, default to bit clock * 2 */
		clk_set_rate(iface->mclk, 2 * srate);
		} else {
		/* Check if we can actually get the bit clock from mclk */
		if (iface->mclk_rate % srate) {