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Commit 23adbe6f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86/pti updates from Thomas Gleixner:
 "Two small fixes correcting the handling of SSB mitigations on AMD
  processors"

* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR
  x86/bugs: Update when to check for the LS_CFG SSBD mitigation
parents 6f27a640 612bc3b3

arch/x86/kernel/cpu/amd.c

+3 −1
Original line number Diff line number Diff line
@@ -543,7 +543,9 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) 
		nodes_per_socket = ((value >> 3) & 7) + 1;

	}



	if (c->x86 >= 0x15 && c->x86 <= 0x17) {

	if (!boot_cpu_has(X86_FEATURE_AMD_SSBD) &&

	    !boot_cpu_has(X86_FEATURE_VIRT_SSBD) &&

	    c->x86 >= 0x15 && c->x86 <= 0x17) {

		unsigned int bit;



		switch (c->x86) {

arch/x86/kernel/cpu/bugs.c

+5 −3
Original line number Diff line number Diff line
@@ -155,7 +155,8 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest) 
		guestval |= guest_spec_ctrl & x86_spec_ctrl_mask;



		/* SSBD controlled in MSR_SPEC_CTRL */

		if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))

		if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||

		    static_cpu_has(X86_FEATURE_AMD_SSBD))

			hostval |= ssbd_tif_to_spec_ctrl(ti->flags);



		if (hostval != guestval) {
@@ -533,9 +534,10 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void) 
		 * Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD may

		 * use a completely different MSR and bit dependent on family.

		 */

		if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))

		if (!static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) &&

		    !static_cpu_has(X86_FEATURE_AMD_SSBD)) {

			x86_amd_ssb_disable();

		else {

		} else {

			x86_spec_ctrl_base |= SPEC_CTRL_SSBD;

			x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;

			wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);