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Commit 23ad2b46 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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arm64: dts: renesas: r8a774c0: Fix register range of display node 



Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.

Based on commit 06585ed3 ("arm64: dts: renesas: r8a77990: Fix
register range of display node") for R-Car E3.

Fixes: 8ed3a6b2 ("arm64: dts: renesas: r8a774c0: Add display output support")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 5eb624eb

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -1805,7 +1805,7 @@ 


		du: display@feb00000 {

			compatible = "renesas,du-r8a774c0";

			reg = <0 0xfeb00000 0 0x80000>;

			reg = <0 0xfeb00000 0 0x40000>;

			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 724>,