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Commit 2362bf12 authored by Odelu Kukatla's avatar Odelu Kukatla Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add stub interconnect devices for YUPIK 

Add stub interconnect devices for aggre1_noc, aggre2_noc,
config_noc, dc_noc, gem_noc, lpass_ag_noc, mc_virt_noc,
mmss_noc, nsp_noc, system_noc, This will allow consumers
to get their path and set bandwidth constraints on them.

Change-Id: I3dc8f90709f3db9f7e901e8a00876efe9ceecde0
parent 357e3b2b

qcom/yupik.dtsi

+62 −0
Original line number Diff line number Diff line
@@ -5,6 +5,9 @@ 
#include <dt-bindings/clock/qcom,gpucc-yupik.h>

#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/clock/qcom,videocc-yupik.h>

#include <dt-bindings/interconnect/qcom,epss-l3.h>

#include <dt-bindings/interconnect/qcom,icc.h>

#include <dt-bindings/interconnect/qcom,yupik.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {
@@ -373,6 +376,65 @@ 
		#reset-cells = <1>;

	};



	clk_virt: interconnect {

		compatible = "qcom,yupik-clk_virt";

		#interconnect-cells = <1>;

	};



	config_noc: interconnect@1500000 {

		compatible = "qcom,yupik-config_noc";

		#interconnect-cells = <1>;

	};



	mc_virt: interconnect@1580000 {

		compatible = "qcom,yupik-mc_virt";

		#interconnect-cells = <1>;

	};



	system_noc: interconnect@1680000 {

		compatible = "qcom,yupik-system_noc";

		#interconnect-cells = <1>;

	};



	aggre1_noc: interconnect@16e0000 {

		compatible = "qcom,yupik-aggre1_noc";

		#interconnect-cells = <1>;

	};



	aggre2_noc: interconnect@1700000 {

		compatible = "qcom,yupik-aggre2_noc";

		#interconnect-cells = <1>;

	};



	mmss_noc: interconnect@1740000 {

		compatible = "qcom,yupik-mmss_noc";

		#interconnect-cells = <1>;

	};



	lpass_ag_noc: interconnect@3c40000 {

		compatible = "qcom,yupik-lpass_ag_noc";

		#interconnect-cells = <1>;

	};



	dc_noc: interconnect@90e0000 {

		compatible = "qcom,yupik-dc_noc";

		#interconnect-cells = <1>;

	};



	gem_noc: interconnect@9100000 {

		compatible = "qcom,yupik-gem_noc";

		#interconnect-cells = <1>;

	};



	nsp_noc: interconnect@a0c0000 {

		compatible = "qcom,yupik-nsp_noc";

		#interconnect-cells = <1>;

	};



	epss_l3_cpu: l3_cpu@18590000 {

		compatible = "qcom,yupik-epss-l3-cpu";

		#interconnect-cells = <1>;

	};

};



#include "shima-gdsc.dtsi"