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Commit 2256d893 authored by Nicolas Saenz Julienne's avatar Nicolas Saenz Julienne Committed by Stephen Boyd
Browse files

clk: bcm2835: remove pllb



Raspberry Pi's firmware controls this pll, we should use the firmware
interface to access it.

Signed-off-by: default avatarNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 789bc177
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+4 −24
Original line number Diff line number Diff line
@@ -1651,30 +1651,10 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
		.fixed_divider = 1,
		.flags = CLK_SET_RATE_PARENT),

	/* PLLB is used for the ARM's clock. */
	[BCM2835_PLLB]		= REGISTER_PLL(
		.name = "pllb",
		.cm_ctrl_reg = CM_PLLB,
		.a2w_ctrl_reg = A2W_PLLB_CTRL,
		.frac_reg = A2W_PLLB_FRAC,
		.ana_reg_base = A2W_PLLB_ANA0,
		.reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
		.lock_mask = CM_LOCK_FLOCKB,

		.ana = &bcm2835_ana_default,

		.min_rate = 600000000u,
		.max_rate = 3000000000u,
		.max_fb_rate = BCM2835_MAX_FB_RATE),
	[BCM2835_PLLB_ARM]	= REGISTER_PLL_DIV(
		.name = "pllb_arm",
		.source_pll = "pllb",
		.cm_reg = CM_PLLB,
		.a2w_reg = A2W_PLLB_ARM,
		.load_mask = CM_PLLB_LOADARM,
		.hold_mask = CM_PLLB_HOLDARM,
		.fixed_divider = 1,
		.flags = CLK_SET_RATE_PARENT),
	/*
	 * PLLB is used for the ARM's clock. Controlled by firmware, see
	 * clk-raspberrypi.c.
	 */

	/*
	 * PLLC is the core PLL, used to drive the core VPU clock.