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Commit 225380b3 authored by Archit Taneja's avatar Archit Taneja Committed by Rob Clark
Browse files

drm/msm/dsi: Add support for 28nm PHY on 8960



DSI PHY on MSM8960 and APQ8064 is a 28nm PHY that's different from the
supported 28nm LP PHY found in newer chips.

Add support for the new PHY.

Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent e6c4c78c
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+8 −0
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@@ -54,3 +54,11 @@ config DRM_MSM_DSI_20NM_PHY
	default y
	help
	  Choose this option if the 20nm DSI PHY is used on the platform.

config DRM_MSM_DSI_28NM_8960_PHY
	bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
	depends on DRM_MSM_DSI
	default y
	help
	  Choose this option if the 28nm DSI PHY 8960 variant is used on the
	  platform.
+1 −0
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@@ -63,6 +63,7 @@ msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \

msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o

ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
msm-y += dsi/pll/dsi_pll.o
+1 −0
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@@ -31,6 +31,7 @@ enum msm_dsi_phy_type {
	MSM_DSI_PHY_28NM_HPM,
	MSM_DSI_PHY_28NM_LP,
	MSM_DSI_PHY_20NM,
	MSM_DSI_PHY_28NM_8960,
	MSM_DSI_PHY_MAX
};

+4 −0
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@@ -276,6 +276,10 @@ static const struct of_device_id dsi_phy_dt_match[] = {
#ifdef CONFIG_DRM_MSM_DSI_20NM_PHY
	{ .compatible = "qcom,dsi-phy-20nm",
	  .data = &dsi_phy_20nm_cfgs },
#endif
#ifdef CONFIG_DRM_MSM_DSI_28NM_8960_PHY
	{ .compatible = "qcom,dsi-phy-28nm-8960",
	  .data = &dsi_phy_28nm_8960_cfgs },
#endif
	{}
};
+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ struct msm_dsi_phy_cfg {
extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;

struct msm_dsi_dphy_timing {
	u32 clk_pre;
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