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Commit 22331f89 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu-feature updates from Ingo Molnar:

 - Rework the Intel model names symbols/macros, which were decades of
   ad-hoc extensions and added random noise. It's now a coherent, easy
   to follow nomenclature.

 - Add new Intel CPU model IDs:
    - "Tiger Lake" desktop and mobile models
    - "Elkhart Lake" model ID
    - and the "Lightning Mountain" variant of Airmont, plus support code

 - Add the new AVX512_VP2INTERSECT instruction to cpufeatures

 - Remove Intel MPX user-visible APIs and the self-tests, because the
   toolchain (gcc) is not supporting it going forward. This is the
   first, lowest-risk phase of MPX removal.

 - Remove X86_FEATURE_MFENCE_RDTSC

 - Various smaller cleanups and fixes

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
  x86/cpu: Update init data for new Airmont CPU model
  x86/cpu: Add new Airmont variant to Intel family
  x86/cpu: Add Elkhart Lake to Intel family
  x86/cpu: Add Tiger Lake to Intel family
  x86: Correct misc typos
  x86/intel: Add common OPTDIFFs
  x86/intel: Aggregate microserver naming
  x86/intel: Aggregate big core graphics naming
  x86/intel: Aggregate big core mobile naming
  x86/intel: Aggregate big core client naming
  x86/cpufeature: Explain the macro duplication
  x86/ftrace: Remove mcount() declaration
  x86/PCI: Remove superfluous returns from void functions
  x86/msr-index: Move AMD MSRs where they belong
  x86/cpu: Use constant definitions for CPU models
  lib: Remove redundant ftrace flag removal
  x86/crash: Remove unnecessary comparison
  x86/bitops: Use __builtin_constant_p() directly instead of IS_IMMEDIATE()
  x86: Remove X86_FEATURE_MFENCE_RDTSC
  x86/mpx: Remove MPX APIs
  ...
parents fc6fd139 0cc5359d

arch/x86/events/intel/core.c

+37 −37
Original line number Diff line number Diff line
@@ -3987,31 +3987,31 @@ static __init void intel_clovertown_quirk(void) 
}



static const struct x86_cpu_desc isolation_ucodes[] = {

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_CORE,		 3, 0x0000001f),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_ULT,		 1, 0x0000001e),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_GT3E,		 1, 0x00000015),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL,		 3, 0x0000001f),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_L,		 1, 0x0000001e),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_G,		 1, 0x00000015),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X,		 2, 0x00000037),

	INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X,		 4, 0x0000000a),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_CORE,	 4, 0x00000023),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_GT3E,	 1, 0x00000014),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_XEON_D,	 2, 0x00000010),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_XEON_D,	 3, 0x07000009),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_XEON_D,	 4, 0x0f000009),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_XEON_D,	 5, 0x0e000002),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL,		 4, 0x00000023),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_G,		 1, 0x00000014),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D,		 2, 0x00000010),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D,		 3, 0x07000009),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D,		 4, 0x0f000009),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D,		 5, 0x0e000002),

	INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X,		 2, 0x0b000014),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,		 3, 0x00000021),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,		 4, 0x00000000),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_MOBILE,	 3, 0x0000007c),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_DESKTOP,	 3, 0x0000007c),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_DESKTOP,	 9, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE,	 9, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE,	10, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE,	11, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE,	12, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_DESKTOP,	10, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_DESKTOP,	11, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_DESKTOP,	12, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_DESKTOP,	13, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_L,		 3, 0x0000007c),

	INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE,		 3, 0x0000007c),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,		 9, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L,		 9, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L,		10, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L,		11, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L,		12, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,		10, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,		11, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,		12, 0x0000004e),

	INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,		13, 0x0000004e),

	{}

};
@@ -4169,7 +4169,7 @@ static const struct x86_cpu_desc counter_freezing_ucodes[] = { 
	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	 2, 0x0000000e),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	 9, 0x0000002e),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	10, 0x00000008),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_X,	 1, 0x00000028),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_D,	 1, 0x00000028),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	 1, 0x00000028),

	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	 8, 0x00000006),

	{}
@@ -4667,7 +4667,7 @@ __init int intel_pmu_init(void) 
		break;



	case INTEL_FAM6_ATOM_SILVERMONT:

	case INTEL_FAM6_ATOM_SILVERMONT_X:

	case INTEL_FAM6_ATOM_SILVERMONT_D:

	case INTEL_FAM6_ATOM_SILVERMONT_MID:

	case INTEL_FAM6_ATOM_AIRMONT:

	case INTEL_FAM6_ATOM_AIRMONT_MID:
@@ -4689,7 +4689,7 @@ __init int intel_pmu_init(void) 
		break;



	case INTEL_FAM6_ATOM_GOLDMONT:

	case INTEL_FAM6_ATOM_GOLDMONT_X:

	case INTEL_FAM6_ATOM_GOLDMONT_D:

		x86_add_quirk(intel_counter_freezing_quirk);

		memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,

		       sizeof(hw_cache_event_ids));
@@ -4745,7 +4745,7 @@ __init int intel_pmu_init(void) 
		name = "goldmont_plus";

		break;



	case INTEL_FAM6_ATOM_TREMONT_X:

	case INTEL_FAM6_ATOM_TREMONT_D:

		x86_pmu.late_ack = true;

		memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,

		       sizeof(hw_cache_event_ids));
@@ -4881,10 +4881,10 @@ __init int intel_pmu_init(void) 
		break;





	case INTEL_FAM6_HASWELL_CORE:

	case INTEL_FAM6_HASWELL:

	case INTEL_FAM6_HASWELL_X:

	case INTEL_FAM6_HASWELL_ULT:

	case INTEL_FAM6_HASWELL_GT3E:

	case INTEL_FAM6_HASWELL_L:

	case INTEL_FAM6_HASWELL_G:

		x86_add_quirk(intel_ht_bug);

		x86_add_quirk(intel_pebs_isolation_quirk);

		x86_pmu.late_ack = true;
@@ -4914,9 +4914,9 @@ __init int intel_pmu_init(void) 
		name = "haswell";

		break;



	case INTEL_FAM6_BROADWELL_CORE:

	case INTEL_FAM6_BROADWELL_XEON_D:

	case INTEL_FAM6_BROADWELL_GT3E:

	case INTEL_FAM6_BROADWELL:

	case INTEL_FAM6_BROADWELL_D:

	case INTEL_FAM6_BROADWELL_G:

	case INTEL_FAM6_BROADWELL_X:

		x86_add_quirk(intel_pebs_isolation_quirk);

		x86_pmu.late_ack = true;
@@ -4979,10 +4979,10 @@ __init int intel_pmu_init(void) 
	case INTEL_FAM6_SKYLAKE_X:

		pmem = true;

		/* fall through */

	case INTEL_FAM6_SKYLAKE_MOBILE:

	case INTEL_FAM6_SKYLAKE_DESKTOP:

	case INTEL_FAM6_KABYLAKE_MOBILE:

	case INTEL_FAM6_KABYLAKE_DESKTOP:

	case INTEL_FAM6_SKYLAKE_L:

	case INTEL_FAM6_SKYLAKE:

	case INTEL_FAM6_KABYLAKE_L:

	case INTEL_FAM6_KABYLAKE:

		x86_add_quirk(intel_pebs_isolation_quirk);

		x86_pmu.late_ack = true;

		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -5026,11 +5026,11 @@ __init int intel_pmu_init(void) 
		break;



	case INTEL_FAM6_ICELAKE_X:

	case INTEL_FAM6_ICELAKE_XEON_D:

	case INTEL_FAM6_ICELAKE_D:

		pmem = true;

		/* fall through */

	case INTEL_FAM6_ICELAKE_MOBILE:

	case INTEL_FAM6_ICELAKE_DESKTOP:

	case INTEL_FAM6_ICELAKE_L:

	case INTEL_FAM6_ICELAKE:

		x86_pmu.late_ack = true;

		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));

		memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));

arch/x86/events/intel/cstate.c

+20 −20
Original line number Diff line number Diff line
@@ -593,40 +593,40 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { 
	X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE_X, snb_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_CORE, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_X, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_GT3E, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_G, snb_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_ULT, hswult_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_L, hswult_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT,   slm_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT_X, slm_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT_D, slm_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_AIRMONT,      slm_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_CORE,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_XEON_D, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_GT3E,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_D, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_G, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X, snb_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE,  snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_L, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE,   snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE,  hswult_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, hswult_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_L, hswult_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE,   hswult_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_MOBILE, cnl_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_L, cnl_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNL, knl_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT,   glm_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_X, glm_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_D, glm_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),



	X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_MOBILE, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_DESKTOP, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_L, snb_cstates),

	X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE,   snb_cstates),

	{ },

};

MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);

arch/x86/events/intel/pt.c

+3 −3
Original line number Diff line number Diff line
@@ -204,9 +204,9 @@ static int __init pt_pmu_hw_init(void) 


	/* model-specific quirks */

	switch (boot_cpu_data.x86_model) {

	case INTEL_FAM6_BROADWELL_CORE:

	case INTEL_FAM6_BROADWELL_XEON_D:

	case INTEL_FAM6_BROADWELL_GT3E:

	case INTEL_FAM6_BROADWELL:

	case INTEL_FAM6_BROADWELL_D:

	case INTEL_FAM6_BROADWELL_G:

	case INTEL_FAM6_BROADWELL_X:

		/* not setting BRANCH_EN will #GP, erratum BDM106 */

		pt_pmu.branch_en_always_on = true;

arch/x86/events/intel/rapl.c

+14 −14
Original line number Diff line number Diff line
@@ -720,27 +720,27 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = { 
	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X,		model_snbep),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE,		model_snb),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X,		model_snbep),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_CORE,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_X,		model_hsx),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_CORE,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_L,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_G,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_G,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_X,		model_hsx),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D,	model_hsx),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_D,		model_hsx),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL,		model_knl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM,		model_knl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP,	model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X,		model_hsx),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE,	model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP,	model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_MOBILE,	model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_L,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT,		model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_X,	model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_D,	model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	model_hsw),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP,	model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_L,		model_skl),

	X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE,		model_skl),

	{},

};

arch/x86/events/intel/uncore.c

+14 −14
Original line number Diff line number Diff line
@@ -1451,29 +1451,29 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = { 
	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EP,	  nhm_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE,	  snb_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE,	  ivb_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_CORE,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_CORE, bdw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, bdw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_L,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_G,	  hsw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL,	  bdw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_G,	  bdw_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X,  snbep_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM_EX,	  nhmex_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EX,	  nhmex_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X,	  ivbep_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_X,	  hswep_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_X,	  bdx_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, bdx_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_D,	  bdx_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL,	  knl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM,	  knl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP,skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE,	  skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L,	  skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X,      skx_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE, skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, icl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L,	  skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE,	  skl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_L,	  icl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_NNPI,	  icl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, icl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ATOM_TREMONT_X, snr_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE,	  icl_uncore_init),

	X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ATOM_TREMONT_D, snr_uncore_init),

	{},

};