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Commit 21feb1f6 authored by Wyes Karny's avatar Wyes Karny Committed by Gerrit - the friendly Code Review server
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msm: camera: isp: Add UBWC compression disable support



Adding UBWC compression disable support.

CRs-Fixed: 2789618
Change-Id: I994e6698ce945b7bed2a1207d4b52e4f10b99df1
Signed-off-by: default avatarWyes Karny <wkarny@codeaurora.org>
parent d74902f0
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+12 −0
Original line number Diff line number Diff line
@@ -645,6 +645,7 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
		break;
	case CAM_ICP_CMD_UBWC_CFG: {
		struct a5_ubwc_cfg_ext *ubwc_cfg_ext = NULL;
		uint32_t *disable_ubwc_comp;

		a5_soc = soc_info->soc_private;
		if (!a5_soc) {
@@ -652,6 +653,13 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
			return -EINVAL;
		}

		if (!cmd_args) {
			CAM_ERR(CAM_ICP, "Invalid args");
			return -EINVAL;
		}

		disable_ubwc_comp = (uint32_t *)cmd_args;

		if (a5_soc->ubwc_config_ext) {
			/* Invoke kernel API to determine DDR type */
			ddr_type = of_fdt_get_ddrtype();
@@ -668,6 +676,10 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
				ubwc_cfg_ext->ubwc_bps_fetch_cfg[index];
			ubwc_bps_cfg[1] =
				ubwc_cfg_ext->ubwc_bps_write_cfg[index];
			if (*disable_ubwc_comp) {
				ubwc_ipe_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
				ubwc_bps_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
			}
			rc = hfi_cmd_ubwc_config_ext(&ubwc_ipe_cfg[0],
					&ubwc_bps_cfg[0]);
		} else {
+11 −2
Original line number Diff line number Diff line
@@ -113,14 +113,19 @@ static int cam_icp_send_ubwc_cfg(struct cam_icp_hw_mgr *hw_mgr)
{
	struct cam_hw_intf *icp_dev_intf = hw_mgr->icp_dev_intf;
	int rc;
	uint32_t disable_ubwc_comp = 0;

	if (!icp_dev_intf) {
		CAM_ERR(CAM_ICP, "ICP device interface is NULL");
		return -EINVAL;
	}

	rc = icp_dev_intf->hw_ops.process_cmd(icp_dev_intf->hw_priv,
			CAM_ICP_CMD_UBWC_CFG, NULL, 0);
	disable_ubwc_comp = hw_mgr->disable_ubwc_comp;

	rc = icp_dev_intf->hw_ops.process_cmd(
		icp_dev_intf->hw_priv,
		CAM_ICP_CMD_UBWC_CFG, (void *)&disable_ubwc_comp,
		sizeof(disable_ubwc_comp));
	if (rc)
		CAM_ERR(CAM_ICP, "CAM_ICP_CMD_UBWC_CFG is failed");

@@ -1918,6 +1923,10 @@ static int cam_icp_hw_mgr_create_debugfs_entry(void)

	dbgfileptr = debugfs_create_file("icp_fw_dump_lvl", 0644,
		icp_hw_mgr.dentry, NULL, &cam_icp_debug_fw_dump);

	dbgfileptr = debugfs_create_bool("disable_ubwc_comp", 0644,
		icp_hw_mgr.dentry, &icp_hw_mgr.disable_ubwc_comp);

	if (IS_ERR(dbgfileptr)) {
		if (PTR_ERR(dbgfileptr) == -ENODEV)
			CAM_WARN(CAM_ICP, "DebugFS not enabled in kernel!");
+2 −0
Original line number Diff line number Diff line
@@ -352,6 +352,7 @@ struct cam_icp_clk_info {
 * @bps_dev_intf: Device interface for BPS
 * @ipe_clk_state: IPE clock state flag
 * @bps_clk_state: BPS clock state flag
 * @disable_ubwc_comp: Disable UBWC compression
 * @recovery: Flag to validate if in previous session FW
 *            reported a fatal error or wdt. If set FW is
 *            re-downloaded for new camera session.
@@ -400,6 +401,7 @@ struct cam_icp_hw_mgr {
	struct cam_hw_intf *bps_dev_intf;
	bool ipe_clk_state;
	bool bps_clk_state;
	bool disable_ubwc_comp;
	atomic_t recovery;
};

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@
#define CAM_ICP_BW_CONFIG_V1      1
#define CAM_ICP_BW_CONFIG_V2      2

#define CAM_ICP_UBWC_COMP_EN      BIT(1)

enum cam_icp_hw_type {
	CAM_ICP_DEV_A5,
	CAM_ICP_DEV_IPE,
+26 −1
Original line number Diff line number Diff line
@@ -4299,7 +4299,7 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
	struct cam_ife_hw_mgr_ctx        *ctx;
	struct cam_isp_hw_mgr_res        *hw_mgr_res;
	struct cam_isp_resource_node     *rsrc_node = NULL;
	uint32_t                          i, camif_debug;
	uint32_t                          i, j, camif_debug, disable_ubwc_comp;
	bool                              res_rdi_context_set = false;
	uint32_t                          primary_rdi_src_res;
	uint32_t                          primary_rdi_out_res;
@@ -4373,6 +4373,27 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
		}
	}

	if (g_ife_hw_mgr.debug_cfg.disable_ubwc_comp) {
		disable_ubwc_comp = 1;
		for (i = 0; i < CAM_IFE_HW_OUT_RES_MAX; i++) {
			hw_mgr_res = &ctx->res_list_ife_out[i];
			for (j = 0; j < CAM_ISP_HW_SPLIT_MAX; j++) {
				if (!hw_mgr_res->hw_res[i])
					continue;

				rsrc_node = hw_mgr_res->hw_res[i];
				if (rsrc_node->hw_intf->hw_ops.process_cmd) {
					rc = rsrc_node->hw_intf->hw_ops.process_cmd(
						rsrc_node->hw_intf->hw_priv,
						CAM_ISP_HW_CMD_DISABLE_UBWC_COMP,
						&disable_ubwc_comp,
						sizeof(disable_ubwc_comp));
				}
			}
			break;
		}
	}

	rc = cam_ife_hw_mgr_init_hw(ctx);
	if (rc) {
		CAM_ERR(CAM_ISP, "Init failed");
@@ -7960,6 +7981,10 @@ static int cam_ife_hw_mgr_debug_register(void)
	dbgfileptr = debugfs_create_bool("per_req_reg_dump", 0644,
		g_ife_hw_mgr.debug_cfg.dentry,
		&g_ife_hw_mgr.debug_cfg.per_req_reg_dump);
	dbgfileptr = debugfs_create_bool("disable_ubwc_comp", 0644,
		g_ife_hw_mgr.debug_cfg.dentry,
		&g_ife_hw_mgr.debug_cfg.disable_ubwc_comp);

	if (IS_ERR(dbgfileptr)) {
		if (PTR_ERR(dbgfileptr) == -ENODEV)
			CAM_WARN(CAM_ISP, "DebugFS not enabled in kernel!");
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