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Commit 21eb1850 authored by Chris Wilson's avatar Chris Wilson
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drm/i95: Mark GGTT as incoherent for gen10+ 

The evidence suggests that we need to start treating writes via GGTT as
incoherent for gen10+, that is that they are internally buffered and not
immediately visible via a read along a different physical path.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107398
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107400
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107435


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180801104721.4030-1-chris@chris-wilson.co.uk
parent 60548c55

drivers/gpu/drm/i915/i915_pci.c

+1 −0
Original line number Diff line number Diff line
@@ -590,6 +590,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = { 
	GEN9_FEATURES, \

	GEN(10), \

	.ddb_size = 1024, \

	.has_coherent_ggtt = false, \

	GLK_COLORS



static const struct intel_device_info intel_cannonlake_info = {