mtd: nand: spansion S30MLxxxP support (2173bae8) · Commits · e / devices / android_kernel_fairphone_FP5

Some Spansion chips have a method for determining eraseblock size that is incompatible with similar ID chips of other sizes. This implements some heuristic detection of these differences. This patch checks for a 5-byte ID with trailing zeros as well as a 512-byte page size to ensure that chips are not misdetected as the S30MLxxxP ORNAND series. [Tweaked by Artem a bit] Signed-off-by:

Brian Norris <norris@broadcom.com> Signed-off-by:

Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by:

David Woodhouse <David.Woodhouse@intel.com>

drivers/mtd/nand/nand_base.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -2900,6 +2900,19 @@ static struct nand_flash_dev nand_get_flash_type(struct mtd_info mtd,
		mtd->writesize = type->pagesize;
		mtd->oobsize = mtd->writesize / 32;
		busw = type->options & NAND_BUSWIDTH_16;

		/*
		* Check for Spansion/AMD ID + repeating 5th, 6th byte since
		* some Spansion chips have erasesize that conflicts with size
		* listed in nand_ids table
		* Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
		*/
		if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
		id_data[5] == 0x00 && id_data[6] == 0x00 &&
		id_data[7] == 0x00 && mtd->writesize == 512) {
		mtd->erasesize = 128 * 1024;
		mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
		}
		}

		/* Try to identify manufacturer */