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Commit 215e83d9 authored by Linus Walleij's avatar Linus Walleij Committed by Russell King
Browse files

ARM: 7233/1: ux500: remove overlapping iotable entries 



The overlapping iotable mapping entries for the ux500 Cortex
A9 SCU, CPU control and TWD are no longer accepted by the
kernel. Remove the overlaps so the machine boots again.

Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Reported-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2f0778af

arch/arm/mach-ux500/cpu-db5500.c

+2 −3
Original line number Diff line number Diff line
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = { 
};



static struct map_desc u5500_io_desc[] __initdata = {

	__IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K),

	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */

	__IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),



	__IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),

arch/arm/mach-ux500/cpu-db8500.c

+2 −3
Original line number Diff line number Diff line
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = { 
};



static struct map_desc u8500_io_desc[] __initdata = {

	__IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),

	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */

	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),



	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),