Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 211b4c14 authored by Sudheer Mogilappagari's avatar Sudheer Mogilappagari Committed by Jeff Kirsher
Browse files

i40e: Add new PHY types for 25G AOC and ACC support



This patch adds support for 25G Active Optical Cables (AOC) and Active
Copper Cables (ACC) PHY types.

Signed-off-by: default avatarSudheer Mogilappagari <sudheer.mogilappagari@intel.com>
Signed-off-by: default avatarKrzysztof Malek <krzysztof.malek@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 6987bd25
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -1771,6 +1771,8 @@ enum i40e_aq_phy_type {
	I40E_PHY_TYPE_25GBASE_CR		= 0x20,
	I40E_PHY_TYPE_25GBASE_SR		= 0x21,
	I40E_PHY_TYPE_25GBASE_LR		= 0x22,
	I40E_PHY_TYPE_25GBASE_AOC		= 0x23,
	I40E_PHY_TYPE_25GBASE_ACC		= 0x24,
	I40E_PHY_TYPE_MAX,
	I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP	= 0xFD,
	I40E_PHY_TYPE_EMPTY			= 0xFE,
@@ -1831,6 +1833,8 @@ struct i40e_aq_get_phy_abilities_resp {
#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02
#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08
#define I40E_AQ_PHY_TYPE_EXT_25G_AOC	0x10
#define I40E_AQ_PHY_TYPE_EXT_25G_ACC	0x20
	u8	fec_cfg_curr_mod_ext_info;
#define I40E_AQ_ENABLE_FEC_KR		0x01
#define I40E_AQ_ENABLE_FEC_RS		0x02
+2 −0
Original line number Diff line number Diff line
@@ -1180,6 +1180,8 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
	case I40E_PHY_TYPE_40GBASE_AOC:
	case I40E_PHY_TYPE_10GBASE_AOC:
	case I40E_PHY_TYPE_25GBASE_CR:
	case I40E_PHY_TYPE_25GBASE_AOC:
	case I40E_PHY_TYPE_25GBASE_ACC:
		media = I40E_MEDIA_TYPE_DA;
		break;
	case I40E_PHY_TYPE_1000BASE_KX:
+2 −0
Original line number Diff line number Diff line
@@ -502,6 +502,8 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,
	case I40E_PHY_TYPE_25GBASE_CR:
	case I40E_PHY_TYPE_25GBASE_SR:
	case I40E_PHY_TYPE_25GBASE_LR:
	case I40E_PHY_TYPE_25GBASE_AOC:
	case I40E_PHY_TYPE_25GBASE_ACC:
		supported = SUPPORTED_Autoneg;
		advertising = ADVERTISED_Autoneg;
		/* TODO: add speeds when ethtool is ready to support*/
+4 −0
Original line number Diff line number Diff line
@@ -271,6 +271,10 @@ struct i40e_phy_info {
					     I40E_PHY_TYPE_OFFSET)
#define I40E_CAP_PHY_TYPE_25GBASE_LR BIT_ULL(I40E_PHY_TYPE_25GBASE_LR + \
					     I40E_PHY_TYPE_OFFSET)
#define I40E_CAP_PHY_TYPE_25GBASE_AOC BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC + \
					     I40E_PHY_TYPE_OFFSET)
#define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \
					     I40E_PHY_TYPE_OFFSET)
#define I40E_HW_CAP_MAX_GPIO			30
/* Capabilities of a PF or a VF or the whole device */
struct i40e_hw_capabilities {
+4 −0
Original line number Diff line number Diff line
@@ -1767,6 +1767,8 @@ enum i40e_aq_phy_type {
	I40E_PHY_TYPE_25GBASE_CR		= 0x20,
	I40E_PHY_TYPE_25GBASE_SR		= 0x21,
	I40E_PHY_TYPE_25GBASE_LR		= 0x22,
	I40E_PHY_TYPE_25GBASE_AOC		= 0x23,
	I40E_PHY_TYPE_25GBASE_ACC		= 0x24,
	I40E_PHY_TYPE_MAX,
	I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP	= 0xFD,
	I40E_PHY_TYPE_EMPTY			= 0xFE,
@@ -1827,6 +1829,8 @@ struct i40e_aq_get_phy_abilities_resp {
#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02
#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08
#define I40E_AQ_PHY_TYPE_EXT_25G_AOC	0x10
#define I40E_AQ_PHY_TYPE_EXT_25G_ACC	0x20
	u8	fec_cfg_curr_mod_ext_info;
#define I40E_AQ_ENABLE_FEC_KR		0x01
#define I40E_AQ_ENABLE_FEC_RS		0x02