Loading drivers/firmware/qcom_scm-32.c +9 −8 Original line number Diff line number Diff line Loading @@ -277,7 +277,7 @@ static int qcom_scm_call(struct device *dev, struct qcom_scm_desc *desc) * This shall only be used with commands that are guaranteed to be * uninterruptable, atomic and SMP safe. */ static int qcom_scm_call_atomic(struct qcom_scm_desc *desc) static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc) { int context_id; struct arm_smccc_args smc = {{0}}; Loading Loading @@ -310,7 +310,8 @@ static int qcom_scm_call_atomic(struct qcom_scm_desc *desc) * Set the cold boot address of the cpus. Any cpu outside the supported * range would be removed from the cpu present mask. */ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus) { int flags = 0; int cpu; Loading Loading @@ -340,7 +341,7 @@ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) desc.args[1] = virt_to_phys(entry); desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } /** Loading Loading @@ -396,7 +397,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, * the control would return from this function, otherwise, the cpu jumps to the * warm boot entry point set for this cpu upon reset. */ void __qcom_scm_cpu_power_down(u32 flags) void __qcom_scm_cpu_power_down(struct device *dev, u32 flags) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_BOOT, Loading @@ -406,7 +407,7 @@ void __qcom_scm_cpu_power_down(u32 flags) .owner = ARM_SMCCC_OWNER_SIP, }; qcom_scm_call_atomic(&desc); qcom_scm_call_atomic(dev, &desc); } int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) Loading Loading @@ -439,7 +440,7 @@ int __qcom_scm_set_dload_mode(struct device *dev, bool enable) desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral) Loading Loading @@ -560,7 +561,7 @@ int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, desc.args[0] = addr; desc.arginfo = QCOM_SCM_ARGS(1); ret = qcom_scm_call_atomic(&desc); ret = qcom_scm_call_atomic(dev, &desc); if (ret >= 0) *val = desc.res[0]; Loading @@ -579,7 +580,7 @@ int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val) desc.args[1] = val; desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id) Loading drivers/firmware/qcom_scm-64.c +3 −2 Original line number Diff line number Diff line Loading @@ -216,7 +216,8 @@ static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc) * Set the cold boot address of the cpus. Any cpu outside the supported * range would be removed from the cpu present mask. */ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus) { return -ENOTSUPP; } Loading Loading @@ -244,7 +245,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, * the control would return from this function, otherwise, the cpu jumps to the * warm boot entry point set for this cpu upon reset. */ void __qcom_scm_cpu_power_down(u32 flags) void __qcom_scm_cpu_power_down(struct device *dev, u32 flags) { } Loading drivers/firmware/qcom_scm.c +3 −2 Original line number Diff line number Diff line Loading @@ -94,7 +94,8 @@ static void qcom_scm_clk_disable(void) */ int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) { return __qcom_scm_set_cold_boot_addr(entry, cpus); return __qcom_scm_set_cold_boot_addr(__scm ? __scm->dev : NULL, entry, cpus); } EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr); Loading Loading @@ -122,7 +123,7 @@ EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr); */ void qcom_scm_cpu_power_down(u32 flags) { __qcom_scm_cpu_power_down(flags); __qcom_scm_cpu_power_down(__scm ? __scm->dev : NULL, flags); } EXPORT_SYMBOL(qcom_scm_cpu_power_down); Loading drivers/firmware/qcom_scm.h +3 −2 Original line number Diff line number Diff line Loading @@ -9,10 +9,11 @@ #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); extern int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus); extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus); extern void __qcom_scm_cpu_power_down(u32 flags); extern void __qcom_scm_cpu_power_down(struct device *dev, u32 flags); extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id); extern int __qcom_scm_set_dload_mode(struct device *dev, bool enable); #define QCOM_SCM_FLUSH_FLAG_MASK 0x3 Loading Loading
drivers/firmware/qcom_scm-32.c +9 −8 Original line number Diff line number Diff line Loading @@ -277,7 +277,7 @@ static int qcom_scm_call(struct device *dev, struct qcom_scm_desc *desc) * This shall only be used with commands that are guaranteed to be * uninterruptable, atomic and SMP safe. */ static int qcom_scm_call_atomic(struct qcom_scm_desc *desc) static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc) { int context_id; struct arm_smccc_args smc = {{0}}; Loading Loading @@ -310,7 +310,8 @@ static int qcom_scm_call_atomic(struct qcom_scm_desc *desc) * Set the cold boot address of the cpus. Any cpu outside the supported * range would be removed from the cpu present mask. */ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus) { int flags = 0; int cpu; Loading Loading @@ -340,7 +341,7 @@ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) desc.args[1] = virt_to_phys(entry); desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } /** Loading Loading @@ -396,7 +397,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, * the control would return from this function, otherwise, the cpu jumps to the * warm boot entry point set for this cpu upon reset. */ void __qcom_scm_cpu_power_down(u32 flags) void __qcom_scm_cpu_power_down(struct device *dev, u32 flags) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_BOOT, Loading @@ -406,7 +407,7 @@ void __qcom_scm_cpu_power_down(u32 flags) .owner = ARM_SMCCC_OWNER_SIP, }; qcom_scm_call_atomic(&desc); qcom_scm_call_atomic(dev, &desc); } int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) Loading Loading @@ -439,7 +440,7 @@ int __qcom_scm_set_dload_mode(struct device *dev, bool enable) desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral) Loading Loading @@ -560,7 +561,7 @@ int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, desc.args[0] = addr; desc.arginfo = QCOM_SCM_ARGS(1); ret = qcom_scm_call_atomic(&desc); ret = qcom_scm_call_atomic(dev, &desc); if (ret >= 0) *val = desc.res[0]; Loading @@ -579,7 +580,7 @@ int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val) desc.args[1] = val; desc.arginfo = QCOM_SCM_ARGS(2); return qcom_scm_call_atomic(&desc); return qcom_scm_call_atomic(dev, &desc); } int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id) Loading
drivers/firmware/qcom_scm-64.c +3 −2 Original line number Diff line number Diff line Loading @@ -216,7 +216,8 @@ static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc) * Set the cold boot address of the cpus. Any cpu outside the supported * range would be removed from the cpu present mask. */ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus) { return -ENOTSUPP; } Loading Loading @@ -244,7 +245,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, * the control would return from this function, otherwise, the cpu jumps to the * warm boot entry point set for this cpu upon reset. */ void __qcom_scm_cpu_power_down(u32 flags) void __qcom_scm_cpu_power_down(struct device *dev, u32 flags) { } Loading
drivers/firmware/qcom_scm.c +3 −2 Original line number Diff line number Diff line Loading @@ -94,7 +94,8 @@ static void qcom_scm_clk_disable(void) */ int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) { return __qcom_scm_set_cold_boot_addr(entry, cpus); return __qcom_scm_set_cold_boot_addr(__scm ? __scm->dev : NULL, entry, cpus); } EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr); Loading Loading @@ -122,7 +123,7 @@ EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr); */ void qcom_scm_cpu_power_down(u32 flags) { __qcom_scm_cpu_power_down(flags); __qcom_scm_cpu_power_down(__scm ? __scm->dev : NULL, flags); } EXPORT_SYMBOL(qcom_scm_cpu_power_down); Loading
drivers/firmware/qcom_scm.h +3 −2 Original line number Diff line number Diff line Loading @@ -9,10 +9,11 @@ #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); extern int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus); extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry, const cpumask_t *cpus); extern void __qcom_scm_cpu_power_down(u32 flags); extern void __qcom_scm_cpu_power_down(struct device *dev, u32 flags); extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id); extern int __qcom_scm_set_dload_mode(struct device *dev, bool enable); #define QCOM_SCM_FLUSH_FLAG_MASK 0x3 Loading