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Commit 20787497 authored by Chandana Kishori Chiluveru's avatar Chandana Kishori Chiluveru
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ARM: dts: msm: Correct GCC clocks for UART instances 

This change will map Correct GCC clocks for UART nodes

Change-Id: I4fdf9000369eca411fd05329760939d2503bd720
parent 99a752f1

qcom/sdxlemur-blsp.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -385,7 +385,7 @@ 


		clock-names = "iface_clk", "core_clk";

		clocks = <&gcc GCC_BLSP1_AHB_CLK>,

			<&gcc GCC_BLSP1_UART1_APPS_CLK>;

			<&gcc GCC_BLSP1_UART2_APPS_CLK>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart2a_tx_sleep>,

			<&blsp1_uart2a_rxcts_sleep>, <&blsp1_uart2a_rfr_sleep>;
@@ -421,7 +421,7 @@ 


		clock-names = "iface_clk", "core_clk";

		clocks = <&gcc GCC_BLSP1_AHB_CLK>,

			<&gcc GCC_BLSP1_UART1_APPS_CLK>;

			<&gcc GCC_BLSP1_UART2_APPS_CLK>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart2b_tx_sleep>,<&blsp1_uart2b_rx_sleep>,

			<&blsp1_uart2b_cts_sleep>, <&blsp1_uart2b_rfr_sleep>;
@@ -457,7 +457,7 @@ 


		clock-names = "iface_clk", "core_clk";

		clocks = <&gcc GCC_BLSP1_AHB_CLK>,

			<&gcc GCC_BLSP1_UART1_APPS_CLK>;

			<&gcc GCC_BLSP1_UART3_APPS_CLK>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart3_tx_sleep>,

			<&blsp1_uart3_rxcts_sleep>, <&blsp1_uart3_rfr_sleep>;
@@ -493,7 +493,7 @@ 


		clock-names = "iface_clk", "core_clk";

		clocks = <&gcc GCC_BLSP1_AHB_CLK>,

			<&gcc GCC_BLSP1_UART1_APPS_CLK>;

			<&gcc GCC_BLSP1_UART4_APPS_CLK>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart4a_tx_sleep>,

			<&blsp1_uart4a_rxcts_sleep>, <&blsp1_uart4a_rfr_sleep>;
@@ -529,7 +529,7 @@ 


		clock-names = "iface_clk", "core_clk";

		clocks = <&gcc GCC_BLSP1_AHB_CLK>,

			<&gcc GCC_BLSP1_UART1_APPS_CLK>;

			<&gcc GCC_BLSP1_UART4_APPS_CLK>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart4b_tx_sleep>,

			<&blsp1_uart4b_rxcts_sleep>, <&blsp1_uart4b_rfr_sleep>;