Commit 204c85d1 authored Jun 18, 2015 by Rhyland Klein Committed by Thierry Reding Nov 20, 2015

clk: tegra: pll: Update warning message



Swap out the generic WARN_ON with a WARN which gives more information
about what is happening.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

parent 7db864c9

drivers/clk/tegra/clk-pll.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -692,7 +692,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,

		pdiv = _hw_to_p_div(hw, cfg.p);
		if (pdiv < 0) {
		WARN_ON(1);
		WARN(1, "Clock %s has invalid pdiv value : 0x%x\n",
		__clk_get_name(hw->clk), cfg.p);
		pdiv = 1;
		}