Merge "arm64: defconfig: Enable SCSHRIKE interconnect driver" (20499829) · Commits · e / devices / android_kernel_fairphone_FP5

arch/arm64/configs/vendor/gen3auto_GKI.config

+1 −0

Original line number	Diff line number	Diff line
		@@ -71,3 +71,4 @@ CONFIG_NVMEM_SPMI_SDAM=m
		CONFIG_SC_GCC_SHRIKE=m
		CONFIG_SC_CAMCC_SHRIKE=m
		CONFIG_SC_DISPCC_SHRIKE=m
		CONFIG_INTERCONNECT_QCOM_SCSHRIKE=m

drivers/clk/qcom/gpucc-sm8150.c

+35 −0

Original line number	Diff line number	Diff line
		@@ -103,6 +103,14 @@ static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = {
		{ }
		};

		static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src_scshrike[] = {
		F(19200000, P_BI_TCXO, 1, 0, 0),
		F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0),
		F(400000000, P_GPLL0_OUT_MAIN, 1.5, 0, 0),
		F(500000000, P_GPU_CC_PLL1_OUT_MAIN, 1, 0, 0),
		{ }
		};

		static struct clk_rcg2 gpu_cc_gmu_clk_src = {
		.cmd_rcgr = 0x1120,
		.mnd_width = 0,
		@@ -270,10 +278,33 @@ static const struct qcom_cc_desc gpu_cc_sm8150_desc = {
		static const struct of_device_id gpu_cc_sm8150_match_table[] = {
		{ .compatible = "qcom,sm8150-gpucc" },
		{ .compatible = "qcom,sa8155-gpucc" },
		{ .compatible = "qcom,scshrike-gpucc" },
		{ }
		};
		MODULE_DEVICE_TABLE(of, gpu_cc_sm8150_match_table);

		static void gpu_cc_sm8150_fixup_scshrike(void)
		{
		gpu_cc_gmu_clk_src.freq_tbl = ftbl_gpu_cc_gmu_clk_src_scshrike;
		gpu_cc_gmu_clk_src.clkr.vdd_data.rate_max[VDD_LOW] = 400000000;
		gpu_cc_gmu_clk_src.clkr.vdd_data.rate_max[VDD_LOW_L1] = 500000000;
		}

		static int gpu_cc_sm8150_fixup(struct platform_device *pdev)
		{
		const char *compat = NULL;
		int compatlen = 0;

		compat = of_get_property(pdev->dev.of_node, "compatible", &compatlen);
		if (!compat \|\| (compatlen <= 0))
		return -EINVAL;

		if (!strcmp(compat, "qcom,gpucc-scshrike"))
		gpu_cc_sm8150_fixup_scshrike();

		return 0;
		}

		static int gpu_cc_sm8150_probe(struct platform_device *pdev)
		{
		struct regmap *regmap;
		@@ -297,6 +328,10 @@ static int gpu_cc_sm8150_probe(struct platform_device *pdev)
		if (IS_ERR(regmap))
		return PTR_ERR(regmap);

		ret = gpu_cc_sm8150_fixup(pdev);
		if (ret)
		return ret;

		clk_trion_pll_configure(&gpu_cc_pll1, regmap, gpu_cc_pll1.config);

		ret = qcom_cc_really_probe(pdev, &gpu_cc_sm8150_desc, regmap);

drivers/clk/qcom/scc-sm8150.c

+11 −1

Original line number	Diff line number	Diff line
		@@ -579,6 +579,8 @@ static const struct of_device_id scc_sm8150_match_table[] = {
		{ .compatible = "qcom,sm8150-scc-v2" },
		{ .compatible = "qcom,sa8155-scc" },
		{ .compatible = "qcom,sa8155-scc-v2" },
		{ .compatible = "qcom,sa8195-scc" },
		{ .compatible = "qcom,sa8195-scc-v2" },
		{ }
		};
		MODULE_DEVICE_TABLE(of, scc_sm8150_match_table);
		@@ -666,11 +668,19 @@ static int scc_sm8150_fixup(struct platform_device pdev, struct regmap regmap)
		scc_sm8150_fixup_sm8150v2(regmap);

		if (!strcmp(compat, "qcom,sa8155-scc") \|\|
		!strcmp(compat, "qcom,sa8155-scc-v2")) {
		!strcmp(compat, "qcom,sa8155-scc-v2") \|\|
		!strcmp(compat, "qcom,sa8195-scc") \|\|
		!strcmp(compat, "qcom,sa8195-scc-v2")) {
		pdev->dev.driver->pm = &scc_sa8155_pm_ops;
		dev_set_drvdata(&pdev->dev, regmap);
		}

		if (!strcmp(compat, "qcom,sa8195-scc") \|\|
		!strcmp(compat, "qcom,sa8195-scc-v2")) {
		vdd_scc_cx.num_levels = VDD_MM_NUM;
		vdd_scc_cx.cur_level = VDD_MM_NUM;
		}

		return 0;
		}