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Commit 1fb344a3 authored by Jeeja KP's avatar Jeeja KP Committed by Mark Brown
Browse files

ASoC: Intel: bxtn: Update DSP core state in D0 



In system suspend, firmware needs to be re-downloaded as IMR is cleared.
When firmware is downloaded in D0, core state is not set to running
state causing instability with subsequent D0-D3 cycles.

So set the core state correctly during D0 and check the DSP core state
if not in reset to set the DSP to D3.

Signed-off-by: default avatarJeeja KP <jeeja.kp@intel.com>
Acked-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 5518af9f

sound/soc/intel/skylake/bxt-sst.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -446,6 +446,7 @@ static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) 
				return ret;

				return ret;

			}

			}

		}

		}

		skl->cores.state[core_id] = SKL_DSP_RUNNING;

		return ret;

		return ret;

	}

	}

sound/soc/intel/skylake/skl-sst-dsp.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -355,12 +355,13 @@ int skl_dsp_get_core(struct sst_dsp *ctx, unsigned int core_id) 
		ret = ctx->fw_ops.set_state_D0(ctx, core_id);

		ret = ctx->fw_ops.set_state_D0(ctx, core_id);

		if (ret < 0) {

		if (ret < 0) {

			dev_err(ctx->dev, "unable to get core%d\n", core_id);

			dev_err(ctx->dev, "unable to get core%d\n", core_id);

			return ret;

			goto out;

		}

		}

	}

	}





	skl->cores.usage_count[core_id]++;

	skl->cores.usage_count[core_id]++;





out:

	dev_dbg(ctx->dev, "core id %d state %d usage_count %d\n",

	dev_dbg(ctx->dev, "core id %d state %d usage_count %d\n",

			core_id, skl->cores.state[core_id],

			core_id, skl->cores.state[core_id],

			skl->cores.usage_count[core_id]);

			skl->cores.usage_count[core_id]);
@@ -379,7 +380,8 @@ int skl_dsp_put_core(struct sst_dsp *ctx, unsigned int core_id) 
		return -EINVAL;

		return -EINVAL;

	}

	}





	if (--skl->cores.usage_count[core_id] == 0) {

	if ((--skl->cores.usage_count[core_id] == 0) &&

		(skl->cores.state[core_id] != SKL_DSP_RESET)) {

		ret = ctx->fw_ops.set_state_D3(ctx, core_id);

		ret = ctx->fw_ops.set_state_D3(ctx, core_id);

		if (ret < 0) {

		if (ret < 0) {

			dev_err(ctx->dev, "unable to put core %d: %d\n",

			dev_err(ctx->dev, "unable to put core %d: %d\n",