Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1f9aec96 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo
Browse files

clk: imx: clk-gate2: Switch to clk_hw based API 



Switch the clk_register_gate2 function to clk_hw based API, rename
accordingly and add a macro for clk based legacy. This allows us to
move closer to a clear split between consumer and provider clk APIs.

Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 2bc7e9dc

drivers/clk/imx/clk-gate2.c

+9 −5
Original line number Diff line number Diff line
@@ -125,15 +125,16 @@ static const struct clk_ops clk_gate2_ops = { 
	.is_enabled = clk_gate2_is_enabled,

};



struct clk *clk_register_gate2(struct device *dev, const char *name,

struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name,

		const char *parent_name, unsigned long flags,

		void __iomem *reg, u8 bit_idx, u8 cgr_val,

		u8 clk_gate2_flags, spinlock_t *lock,

		unsigned int *share_count)

{

	struct clk_gate2 *gate;

	struct clk *clk;

	struct clk_hw *hw;

	struct clk_init_data init;

	int ret;



	gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);

	if (!gate)
@@ -154,10 +155,13 @@ struct clk *clk_register_gate2(struct device *dev, const char *name, 
	init.num_parents = parent_name ? 1 : 0;



	gate->hw.init = &init;

	hw = &gate->hw;



	clk = clk_register(dev, &gate->hw);

	if (IS_ERR(clk))

	ret = clk_hw_register(NULL, hw);

	if (ret) {

		kfree(gate);

		return ERR_PTR(ret);

	}



	return clk;

	return hw;

}

drivers/clk/imx/clk.h

+6 −1
Original line number Diff line number Diff line
@@ -59,6 +59,11 @@ struct imx_pll14xx_clk { 
#define imx_clk_cpu(name, parent_name, div, mux, pll, step) \

	imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)->clk



#define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \

				cgr_val, clk_gate_flags, lock, share_count) \

	clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \

				cgr_val, clk_gate_flags, lock, share_count)->clk



struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,

		 void __iomem *base, const struct imx_pll14xx_clk *pll_clk);
@@ -97,7 +102,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, 
struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,

			     void __iomem *base);



struct clk *clk_register_gate2(struct device *dev, const char *name,

struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name,

		const char *parent_name, unsigned long flags,

		void __iomem *reg, u8 bit_idx, u8 cgr_val,

		u8 clk_gate_flags, spinlock_t *lock,