Loading drivers/clk/qcom/clk-regmap-divider.c +11 −7 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #include <linux/kernel.h> Loading Loading @@ -35,8 +35,10 @@ static long div_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_regmap_div *divider = to_clk_regmap_div(hw); return divider_round_rate(hw, rate, prate, NULL, divider->width, CLK_DIVIDER_ROUND_CLOSEST); return divider_round_rate(hw, rate, prate, divider->table, divider->width, CLK_DIVIDER_ROUND_CLOSEST | divider->flags); } static int div_set_rate(struct clk_hw *hw, unsigned long rate, Loading @@ -46,8 +48,9 @@ static int div_set_rate(struct clk_hw *hw, unsigned long rate, struct clk_regmap *clkr = ÷r->clkr; u32 div; div = divider_get_val(rate, parent_rate, NULL, divider->width, CLK_DIVIDER_ROUND_CLOSEST); div = divider_get_val(rate, parent_rate, divider->table, divider->width, CLK_DIVIDER_ROUND_CLOSEST | divider->flags); return regmap_update_bits(clkr->regmap, divider->reg, (BIT(divider->width) - 1) << divider->shift, Loading @@ -65,8 +68,9 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, div >>= divider->shift; div &= BIT(divider->width) - 1; return divider_recalc_rate(hw, parent_rate, div, NULL, CLK_DIVIDER_ROUND_CLOSEST, divider->width); return divider_recalc_rate(hw, parent_rate, div, divider->table, CLK_DIVIDER_ROUND_CLOSEST | divider->flags, divider->width); } const struct clk_ops clk_regmap_div_ops = { Loading drivers/clk/qcom/clk-regmap-divider.h +7 −5 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #ifndef __QCOM_CLK_REGMAP_DIVIDER_H__ Loading @@ -13,6 +13,8 @@ struct clk_regmap_div { u32 reg; u32 shift; u32 width; u32 flags; const struct clk_div_table *table; struct clk_regmap clkr; }; Loading drivers/clk/qcom/vdd-level.h 0 → 100644 +31 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2019, The Linux Foundation. All rights reserved. */ #ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_H #define __DRIVERS_CLK_QCOM_VDD_LEVEL_H #include <linux/regulator/consumer.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> enum vdd_levels { VDD_NONE, VDD_MIN, /* MIN_SVS */ VDD_LOWER, /* LOW_SVS / SVS2 */ VDD_LOW, /* SVS */ VDD_LOW_L1, /* SVS_L1 */ VDD_NOMINAL, /* NOM */ VDD_HIGH, /* TURBO */ VDD_NUM, }; static int vdd_corner[] = { [VDD_NONE] = 0, [VDD_MIN] = RPMH_REGULATOR_LEVEL_MIN_SVS, [VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS, [VDD_LOW] = RPMH_REGULATOR_LEVEL_SVS, [VDD_LOW_L1] = RPMH_REGULATOR_LEVEL_SVS_L1, [VDD_NOMINAL] = RPMH_REGULATOR_LEVEL_NOM, [VDD_HIGH] = RPMH_REGULATOR_LEVEL_TURBO, }; #endif Loading
drivers/clk/qcom/clk-regmap-divider.c +11 −7 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #include <linux/kernel.h> Loading Loading @@ -35,8 +35,10 @@ static long div_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_regmap_div *divider = to_clk_regmap_div(hw); return divider_round_rate(hw, rate, prate, NULL, divider->width, CLK_DIVIDER_ROUND_CLOSEST); return divider_round_rate(hw, rate, prate, divider->table, divider->width, CLK_DIVIDER_ROUND_CLOSEST | divider->flags); } static int div_set_rate(struct clk_hw *hw, unsigned long rate, Loading @@ -46,8 +48,9 @@ static int div_set_rate(struct clk_hw *hw, unsigned long rate, struct clk_regmap *clkr = ÷r->clkr; u32 div; div = divider_get_val(rate, parent_rate, NULL, divider->width, CLK_DIVIDER_ROUND_CLOSEST); div = divider_get_val(rate, parent_rate, divider->table, divider->width, CLK_DIVIDER_ROUND_CLOSEST | divider->flags); return regmap_update_bits(clkr->regmap, divider->reg, (BIT(divider->width) - 1) << divider->shift, Loading @@ -65,8 +68,9 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, div >>= divider->shift; div &= BIT(divider->width) - 1; return divider_recalc_rate(hw, parent_rate, div, NULL, CLK_DIVIDER_ROUND_CLOSEST, divider->width); return divider_recalc_rate(hw, parent_rate, div, divider->table, CLK_DIVIDER_ROUND_CLOSEST | divider->flags, divider->width); } const struct clk_ops clk_regmap_div_ops = { Loading
drivers/clk/qcom/clk-regmap-divider.h +7 −5 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #ifndef __QCOM_CLK_REGMAP_DIVIDER_H__ Loading @@ -13,6 +13,8 @@ struct clk_regmap_div { u32 reg; u32 shift; u32 width; u32 flags; const struct clk_div_table *table; struct clk_regmap clkr; }; Loading
drivers/clk/qcom/vdd-level.h 0 → 100644 +31 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2019, The Linux Foundation. All rights reserved. */ #ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_H #define __DRIVERS_CLK_QCOM_VDD_LEVEL_H #include <linux/regulator/consumer.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> enum vdd_levels { VDD_NONE, VDD_MIN, /* MIN_SVS */ VDD_LOWER, /* LOW_SVS / SVS2 */ VDD_LOW, /* SVS */ VDD_LOW_L1, /* SVS_L1 */ VDD_NOMINAL, /* NOM */ VDD_HIGH, /* TURBO */ VDD_NUM, }; static int vdd_corner[] = { [VDD_NONE] = 0, [VDD_MIN] = RPMH_REGULATOR_LEVEL_MIN_SVS, [VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS, [VDD_LOW] = RPMH_REGULATOR_LEVEL_SVS, [VDD_LOW_L1] = RPMH_REGULATOR_LEVEL_SVS_L1, [VDD_NOMINAL] = RPMH_REGULATOR_LEVEL_NOM, [VDD_HIGH] = RPMH_REGULATOR_LEVEL_TURBO, }; #endif