Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Unverified Commit 1e61405e authored by Kirill Marinushkin's avatar Kirill Marinushkin Committed by Mark Brown
Browse files

ASoC: pcm3060: Add clock select



ADC and DAC can be clocked from separate or same sources CLK1 and CLK2.
By default, ADC is clocked from CLK1, and DAC - from CLK2.

This commits allows sound cards to selest a proper clock source during
`hw_params()` via `snd_soc_dai_set_sysclk()`. It makes possible to have a
single clock source for both ADC and DAC.

Signed-off-by: default avatarKirill Marinushkin <kmarinushkin@birdec.tech>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a3daee08
Loading
Loading
Loading
Loading
+27 −0
Original line number Diff line number Diff line
@@ -18,12 +18,39 @@ static int pcm3060_set_sysclk(struct snd_soc_dai *dai, int clk_id,
{
	struct snd_soc_component *comp = dai->component;
	struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
	unsigned int reg;
	unsigned int val;

	if (dir != SND_SOC_CLOCK_IN) {
		dev_err(comp->dev, "unsupported sysclock dir: %d\n", dir);
		return -EINVAL;
	}

	switch (clk_id) {
	case PCM3060_CLK_DEF:
		val = 0;
		break;

	case PCM3060_CLK1:
		val = (dai->id == PCM3060_DAI_ID_DAC ? PCM3060_REG_CSEL : 0);
		break;

	case PCM3060_CLK2:
		val = (dai->id == PCM3060_DAI_ID_DAC ? 0 : PCM3060_REG_CSEL);
		break;

	default:
		dev_err(comp->dev, "unsupported sysclock id: %d\n", clk_id);
		return -EINVAL;
	}

	if (dai->id == PCM3060_DAI_ID_DAC)
		reg = PCM3060_REG67;
	else
		reg = PCM3060_REG72;

	regmap_update_bits(priv->regmap, reg, PCM3060_REG_CSEL, val);

	priv->dai[dai->id].sclk_freq = freq;

	return 0;
+5 −0
Original line number Diff line number Diff line
@@ -17,6 +17,11 @@ extern const struct regmap_config pcm3060_regmap;
#define PCM3060_DAI_ID_ADC	1
#define PCM3060_DAI_IDS_NUM	2

/* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */
#define PCM3060_CLK_DEF	0 /* default: CLK1->ADC, CLK2->DAC */
#define PCM3060_CLK1		1
#define PCM3060_CLK2		2

struct pcm3060_priv_dai {
	bool is_master;
	unsigned int sclk_freq;