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Commit 1e165a7d authored Jul 03, 2014 by Maxime Ripard

ARM: at91/dt: Declare a second ram controller when relevant



The G45 and 9263 SoCs has two identical ram controller, that are defined as a
single node, with two reg cells.

The proper way to support such a case is to have two separate DT nodes.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

parent 7e948346

arch/arm/boot/dts/at91sam9263.dtsi

+7 −3

Original line number	Diff line number	Diff line
		@@ -71,10 +71,14 @@
		reg = <0xfffffc00 0x100>;
		};

		ramc: ramc@ffffe200 {
		ramc0: ramc@ffffe200 {
		compatible = "atmel,at91sam9260-sdramc";
		reg = <0xffffe200 0x200
		0xffffe800 0x200>;
		reg = <0xffffe200 0x200>;
		};

		ramc1: ramc@ffffe800 {
		compatible = "atmel,at91sam9260-sdramc";
		reg = <0xffffe800 0x200>;
		};

		pit: timer@fffffd30 {

arch/arm/boot/dts/at91sam9g45.dtsi

+6 −2

Original line number	Diff line number	Diff line
		@@ -75,8 +75,12 @@

		ramc0: ramc@ffffe400 {
		compatible = "atmel,at91sam9g45-ddramc";
		reg = <0xffffe400 0x200
		0xffffe600 0x200>;
		reg = <0xffffe400 0x200>;
		};

		ramc1: ramc@ffffe600 {
		compatible = "atmel,at91sam9g45-ddramc";
		reg = <0xffffe600 0x200>;
		};

		pmc: pmc@fffffc00 {