Loading arch/arm/include/asm/dma.h +15 −17 Original line number Diff line number Diff line Loading @@ -19,8 +19,6 @@ #include <asm/system.h> #include <asm/scatterlist.h> typedef unsigned int dmach_t; #include <mach/isa-dma.h> /* Loading Loading @@ -52,44 +50,44 @@ static inline void release_dma_lock(unsigned long flags) /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. */ #define clear_dma_ff(channel) #define clear_dma_ff(chan) /* Set only the page register bits of the transfer address. * * NOTE: This is an architecture specific function, and should * be hidden from the drivers */ extern void set_dma_page(dmach_t channel, char pagenr); extern void set_dma_page(unsigned int chan, char pagenr); /* Request a DMA channel * * Some architectures may need to do allocate an interrupt */ extern int request_dma(dmach_t channel, const char * device_id); extern int request_dma(unsigned int chan, const char * device_id); /* Free a DMA channel * * Some architectures may need to do free an interrupt */ extern void free_dma(dmach_t channel); extern void free_dma(unsigned int chan); /* Enable DMA for this channel * * On some architectures, this may have other side effects like * enabling an interrupt and setting the DMA registers. */ extern void enable_dma(dmach_t channel); extern void enable_dma(unsigned int chan); /* Disable DMA for this channel * * On some architectures, this may have other side effects like * disabling an interrupt or whatever. */ extern void disable_dma(dmach_t channel); extern void disable_dma(unsigned int chan); /* Test whether the specified channel has an active DMA transfer */ extern int dma_channel_active(dmach_t channel); extern int dma_channel_active(unsigned int chan); /* Set the DMA scatter gather list for this channel * Loading @@ -97,7 +95,7 @@ extern int dma_channel_active(dmach_t channel); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); /* Set the DMA address for this channel * Loading @@ -105,9 +103,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void __set_dma_addr(dmach_t channel, void *addr); #define set_dma_addr(channel, addr) \ __set_dma_addr(channel, bus_to_virt(addr)) extern void __set_dma_addr(unsigned int chan, void *addr); #define set_dma_addr(chan, addr) \ __set_dma_addr(chan, bus_to_virt(addr)) /* Set the DMA byte count for this channel * Loading @@ -115,7 +113,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr); * especially since some DMA architectures don't update the * DMA count immediately, but defer it to the enable_dma(). */ extern void set_dma_count(dmach_t channel, unsigned long count); extern void set_dma_count(unsigned int chan, unsigned long count); /* Set the transfer direction for this channel * Loading @@ -124,11 +122,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count); * DMA transfer direction immediately, but defer it to the * enable_dma(). */ extern void set_dma_mode(dmach_t channel, dmamode_t mode); extern void set_dma_mode(unsigned int chan, dmamode_t mode); /* Set the transfer speed for this channel */ extern void set_dma_speed(dmach_t channel, int cycle_ns); extern void set_dma_speed(unsigned int chan, int cycle_ns); /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is Loading @@ -136,7 +134,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns); * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. */ extern int get_dma_residue(dmach_t channel); extern int get_dma_residue(unsigned int chan); #ifndef NO_DMA #define NO_DMA 255 Loading arch/arm/include/asm/mach/dma.h +6 −6 Original line number Diff line number Diff line Loading @@ -15,12 +15,12 @@ struct dma_struct; typedef struct dma_struct dma_t; struct dma_ops { int (*request)(dmach_t, dma_t *); /* optional */ void (*free)(dmach_t, dma_t *); /* optional */ void (*enable)(dmach_t, dma_t *); /* mandatory */ void (*disable)(dmach_t, dma_t *); /* mandatory */ int (*residue)(dmach_t, dma_t *); /* optional */ int (*setspeed)(dmach_t, dma_t *, int); /* optional */ int (*request)(unsigned int, dma_t *); /* optional */ void (*free)(unsigned int, dma_t *); /* optional */ void (*enable)(unsigned int, dma_t *); /* mandatory */ void (*disable)(unsigned int, dma_t *); /* mandatory */ int (*residue)(unsigned int, dma_t *); /* optional */ int (*setspeed)(unsigned int, dma_t *, int); /* optional */ char *type; }; Loading arch/arm/kernel/dma-isa.c +21 −21 Original line number Diff line number Diff line Loading @@ -49,25 +49,25 @@ static unsigned int isa_dma_port[8][7] = { { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } }; static int isa_get_dma_residue(dmach_t channel, dma_t *dma) static int isa_get_dma_residue(unsigned int chan, dma_t *dma) { unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT]; unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; int count; count = 1 + inb(io_port); count |= inb(io_port) << 8; return channel < 4 ? count : (count << 1); return chan < 4 ? count : (count << 1); } static void isa_enable_dma(dmach_t channel, dma_t *dma) static void isa_enable_dma(unsigned int chan, dma_t *dma) { if (dma->invalid) { unsigned long address, length; unsigned int mode; enum dma_data_direction direction; mode = channel & 3; mode = chan & 3; switch (dma->dma_mode & DMA_MODE_MASK) { case DMA_MODE_READ: mode |= ISA_DMA_MODE_READ; Loading Loading @@ -105,34 +105,34 @@ static void isa_enable_dma(dmach_t channel, dma_t *dma) address = dma->buf.dma_address; length = dma->buf.length - 1; outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]); outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]); outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); if (channel >= 4) { if (chan >= 4) { address >>= 1; length >>= 1; } outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]); outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); outb(address, isa_dma_port[channel][ISA_DMA_ADDR]); outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]); outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]); outb(length, isa_dma_port[channel][ISA_DMA_COUNT]); outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]); outb(length, isa_dma_port[chan][ISA_DMA_COUNT]); outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]); if (dma->dma_mode & DMA_AUTOINIT) mode |= ISA_DMA_AUTOINIT; outb(mode, isa_dma_port[channel][ISA_DMA_MODE]); outb(mode, isa_dma_port[chan][ISA_DMA_MODE]); dma->invalid = 0; } outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]); outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]); } static void isa_disable_dma(dmach_t channel, dma_t *dma) static void isa_disable_dma(unsigned int chan, dma_t *dma) { outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]); outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]); } static struct dma_ops isa_dma_ops = { Loading Loading @@ -178,11 +178,11 @@ void __init isa_init_dma(dma_t *dma) outb(0xaa, 0x00); if (inb(0) == 0x55 && inb(0) == 0xaa) { int channel, i; int chan, i; for (channel = 0; channel < 8; channel++) { dma[channel].d_ops = &isa_dma_ops; isa_disable_dma(channel, NULL); for (chan = 0; chan < 8; chan++) { dma[chan].d_ops = &isa_dma_ops; isa_disable_dma(chan, NULL); } outb(0x40, 0x0b); Loading arch/arm/kernel/dma.c +43 −43 Original line number Diff line number Diff line Loading @@ -30,12 +30,12 @@ static dma_t dma_chan[MAX_DMA_CHANNELS]; * * On certain platforms, we have to allocate an interrupt as well... */ int request_dma(dmach_t channel, const char *device_id) int request_dma(unsigned int chan, const char *device_id) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret; if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) if (chan >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (xchg(&dma->lock, 1) != 0) Loading @@ -47,7 +47,7 @@ int request_dma(dmach_t channel, const char *device_id) ret = 0; if (dma->d_ops->request) ret = dma->d_ops->request(channel, dma); ret = dma->d_ops->request(chan, dma); if (ret) xchg(&dma->lock, 0); Loading @@ -55,7 +55,7 @@ int request_dma(dmach_t channel, const char *device_id) return ret; bad_dma: printk(KERN_ERR "dma: trying to allocate DMA%d\n", channel); printk(KERN_ERR "dma: trying to allocate DMA%d\n", chan); return -EINVAL; busy: Loading @@ -68,42 +68,42 @@ EXPORT_SYMBOL(request_dma); * * On certain platforms, we have to free interrupt as well... */ void free_dma(dmach_t channel) void free_dma(unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) if (chan >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (dma->active) { printk(KERN_ERR "dma%d: freeing active DMA\n", channel); dma->d_ops->disable(channel, dma); printk(KERN_ERR "dma%d: freeing active DMA\n", chan); dma->d_ops->disable(chan, dma); dma->active = 0; } if (xchg(&dma->lock, 0) != 0) { if (dma->d_ops->free) dma->d_ops->free(channel, dma); dma->d_ops->free(chan, dma); return; } printk(KERN_ERR "dma%d: trying to free free DMA\n", channel); printk(KERN_ERR "dma%d: trying to free free DMA\n", chan); return; bad_dma: printk(KERN_ERR "dma: trying to free DMA%d\n", channel); printk(KERN_ERR "dma: trying to free DMA%d\n", chan); } EXPORT_SYMBOL(free_dma); /* Set DMA Scatter-Gather list */ void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg) void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA SG while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = sg; dma->sgcount = nr_sg; Loading @@ -115,13 +115,13 @@ EXPORT_SYMBOL(set_dma_sg); * * Copy address to the structure, and set the invalid bit */ void __set_dma_addr (dmach_t channel, void *addr) void __set_dma_addr (unsigned int chan, void *addr) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA address while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = NULL; dma->addr = addr; Loading @@ -133,13 +133,13 @@ EXPORT_SYMBOL(__set_dma_addr); * * Copy address to the structure, and set the invalid bit */ void set_dma_count (dmach_t channel, unsigned long count) void set_dma_count (unsigned int chan, unsigned long count) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA count while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = NULL; dma->count = count; Loading @@ -149,13 +149,13 @@ EXPORT_SYMBOL(set_dma_count); /* Set DMA direction mode */ void set_dma_mode (dmach_t channel, dmamode_t mode) void set_dma_mode (unsigned int chan, dmamode_t mode) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA mode while " "DMA active\n", channel); "DMA active\n", chan); dma->dma_mode = mode; dma->invalid = 1; Loading @@ -164,42 +164,42 @@ EXPORT_SYMBOL(set_dma_mode); /* Enable DMA channel */ void enable_dma (dmach_t channel) void enable_dma (unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (!dma->lock) goto free_dma; if (dma->active == 0) { dma->active = 1; dma->d_ops->enable(channel, dma); dma->d_ops->enable(chan, dma); } return; free_dma: printk(KERN_ERR "dma%d: trying to enable free DMA\n", channel); printk(KERN_ERR "dma%d: trying to enable free DMA\n", chan); BUG(); } EXPORT_SYMBOL(enable_dma); /* Disable DMA channel */ void disable_dma (dmach_t channel) void disable_dma (unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (!dma->lock) goto free_dma; if (dma->active == 1) { dma->active = 0; dma->d_ops->disable(channel, dma); dma->d_ops->disable(chan, dma); } return; free_dma: printk(KERN_ERR "dma%d: trying to disable free DMA\n", channel); printk(KERN_ERR "dma%d: trying to disable free DMA\n", chan); BUG(); } EXPORT_SYMBOL(disable_dma); Loading @@ -207,36 +207,36 @@ EXPORT_SYMBOL(disable_dma); /* * Is the specified DMA channel active? */ int dma_channel_active(dmach_t channel) int dma_channel_active(unsigned int chan) { return dma_chan[channel].active; return dma_chan[chan].active; } EXPORT_SYMBOL(dma_channel_active); void set_dma_page(dmach_t channel, char pagenr) void set_dma_page(unsigned int chan, char pagenr) { printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel); printk(KERN_ERR "dma%d: trying to set_dma_page\n", chan); } EXPORT_SYMBOL(set_dma_page); void set_dma_speed(dmach_t channel, int cycle_ns) void set_dma_speed(unsigned int chan, int cycle_ns) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret = 0; if (dma->d_ops->setspeed) ret = dma->d_ops->setspeed(channel, dma, cycle_ns); ret = dma->d_ops->setspeed(chan, dma, cycle_ns); dma->speed = ret; } EXPORT_SYMBOL(set_dma_speed); int get_dma_residue(dmach_t channel) int get_dma_residue(unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret = 0; if (dma->d_ops->residue) ret = dma->d_ops->residue(channel, dma); ret = dma->d_ops->residue(chan, dma); return ret; } Loading arch/arm/mach-footbridge/dma.c +3 −3 Original line number Diff line number Diff line Loading @@ -20,16 +20,16 @@ #include <asm/hardware/dec21285.h> #if 0 static int fb_dma_request(dmach_t channel, dma_t *dma) static int fb_dma_request(unsigned int chan, dma_t *dma) { return -EINVAL; } static void fb_dma_enable(dmach_t channel, dma_t *dma) static void fb_dma_enable(unsigned int chan, dma_t *dma) { } static void fb_dma_disable(dmach_t channel, dma_t *dma) static void fb_dma_disable(unsigned int chan, dma_t *dma) { } Loading Loading
arch/arm/include/asm/dma.h +15 −17 Original line number Diff line number Diff line Loading @@ -19,8 +19,6 @@ #include <asm/system.h> #include <asm/scatterlist.h> typedef unsigned int dmach_t; #include <mach/isa-dma.h> /* Loading Loading @@ -52,44 +50,44 @@ static inline void release_dma_lock(unsigned long flags) /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. */ #define clear_dma_ff(channel) #define clear_dma_ff(chan) /* Set only the page register bits of the transfer address. * * NOTE: This is an architecture specific function, and should * be hidden from the drivers */ extern void set_dma_page(dmach_t channel, char pagenr); extern void set_dma_page(unsigned int chan, char pagenr); /* Request a DMA channel * * Some architectures may need to do allocate an interrupt */ extern int request_dma(dmach_t channel, const char * device_id); extern int request_dma(unsigned int chan, const char * device_id); /* Free a DMA channel * * Some architectures may need to do free an interrupt */ extern void free_dma(dmach_t channel); extern void free_dma(unsigned int chan); /* Enable DMA for this channel * * On some architectures, this may have other side effects like * enabling an interrupt and setting the DMA registers. */ extern void enable_dma(dmach_t channel); extern void enable_dma(unsigned int chan); /* Disable DMA for this channel * * On some architectures, this may have other side effects like * disabling an interrupt or whatever. */ extern void disable_dma(dmach_t channel); extern void disable_dma(unsigned int chan); /* Test whether the specified channel has an active DMA transfer */ extern int dma_channel_active(dmach_t channel); extern int dma_channel_active(unsigned int chan); /* Set the DMA scatter gather list for this channel * Loading @@ -97,7 +95,7 @@ extern int dma_channel_active(dmach_t channel); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); /* Set the DMA address for this channel * Loading @@ -105,9 +103,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void __set_dma_addr(dmach_t channel, void *addr); #define set_dma_addr(channel, addr) \ __set_dma_addr(channel, bus_to_virt(addr)) extern void __set_dma_addr(unsigned int chan, void *addr); #define set_dma_addr(chan, addr) \ __set_dma_addr(chan, bus_to_virt(addr)) /* Set the DMA byte count for this channel * Loading @@ -115,7 +113,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr); * especially since some DMA architectures don't update the * DMA count immediately, but defer it to the enable_dma(). */ extern void set_dma_count(dmach_t channel, unsigned long count); extern void set_dma_count(unsigned int chan, unsigned long count); /* Set the transfer direction for this channel * Loading @@ -124,11 +122,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count); * DMA transfer direction immediately, but defer it to the * enable_dma(). */ extern void set_dma_mode(dmach_t channel, dmamode_t mode); extern void set_dma_mode(unsigned int chan, dmamode_t mode); /* Set the transfer speed for this channel */ extern void set_dma_speed(dmach_t channel, int cycle_ns); extern void set_dma_speed(unsigned int chan, int cycle_ns); /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is Loading @@ -136,7 +134,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns); * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. */ extern int get_dma_residue(dmach_t channel); extern int get_dma_residue(unsigned int chan); #ifndef NO_DMA #define NO_DMA 255 Loading
arch/arm/include/asm/mach/dma.h +6 −6 Original line number Diff line number Diff line Loading @@ -15,12 +15,12 @@ struct dma_struct; typedef struct dma_struct dma_t; struct dma_ops { int (*request)(dmach_t, dma_t *); /* optional */ void (*free)(dmach_t, dma_t *); /* optional */ void (*enable)(dmach_t, dma_t *); /* mandatory */ void (*disable)(dmach_t, dma_t *); /* mandatory */ int (*residue)(dmach_t, dma_t *); /* optional */ int (*setspeed)(dmach_t, dma_t *, int); /* optional */ int (*request)(unsigned int, dma_t *); /* optional */ void (*free)(unsigned int, dma_t *); /* optional */ void (*enable)(unsigned int, dma_t *); /* mandatory */ void (*disable)(unsigned int, dma_t *); /* mandatory */ int (*residue)(unsigned int, dma_t *); /* optional */ int (*setspeed)(unsigned int, dma_t *, int); /* optional */ char *type; }; Loading
arch/arm/kernel/dma-isa.c +21 −21 Original line number Diff line number Diff line Loading @@ -49,25 +49,25 @@ static unsigned int isa_dma_port[8][7] = { { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } }; static int isa_get_dma_residue(dmach_t channel, dma_t *dma) static int isa_get_dma_residue(unsigned int chan, dma_t *dma) { unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT]; unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; int count; count = 1 + inb(io_port); count |= inb(io_port) << 8; return channel < 4 ? count : (count << 1); return chan < 4 ? count : (count << 1); } static void isa_enable_dma(dmach_t channel, dma_t *dma) static void isa_enable_dma(unsigned int chan, dma_t *dma) { if (dma->invalid) { unsigned long address, length; unsigned int mode; enum dma_data_direction direction; mode = channel & 3; mode = chan & 3; switch (dma->dma_mode & DMA_MODE_MASK) { case DMA_MODE_READ: mode |= ISA_DMA_MODE_READ; Loading Loading @@ -105,34 +105,34 @@ static void isa_enable_dma(dmach_t channel, dma_t *dma) address = dma->buf.dma_address; length = dma->buf.length - 1; outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]); outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]); outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); if (channel >= 4) { if (chan >= 4) { address >>= 1; length >>= 1; } outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]); outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); outb(address, isa_dma_port[channel][ISA_DMA_ADDR]); outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]); outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]); outb(length, isa_dma_port[channel][ISA_DMA_COUNT]); outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]); outb(length, isa_dma_port[chan][ISA_DMA_COUNT]); outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]); if (dma->dma_mode & DMA_AUTOINIT) mode |= ISA_DMA_AUTOINIT; outb(mode, isa_dma_port[channel][ISA_DMA_MODE]); outb(mode, isa_dma_port[chan][ISA_DMA_MODE]); dma->invalid = 0; } outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]); outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]); } static void isa_disable_dma(dmach_t channel, dma_t *dma) static void isa_disable_dma(unsigned int chan, dma_t *dma) { outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]); outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]); } static struct dma_ops isa_dma_ops = { Loading Loading @@ -178,11 +178,11 @@ void __init isa_init_dma(dma_t *dma) outb(0xaa, 0x00); if (inb(0) == 0x55 && inb(0) == 0xaa) { int channel, i; int chan, i; for (channel = 0; channel < 8; channel++) { dma[channel].d_ops = &isa_dma_ops; isa_disable_dma(channel, NULL); for (chan = 0; chan < 8; chan++) { dma[chan].d_ops = &isa_dma_ops; isa_disable_dma(chan, NULL); } outb(0x40, 0x0b); Loading
arch/arm/kernel/dma.c +43 −43 Original line number Diff line number Diff line Loading @@ -30,12 +30,12 @@ static dma_t dma_chan[MAX_DMA_CHANNELS]; * * On certain platforms, we have to allocate an interrupt as well... */ int request_dma(dmach_t channel, const char *device_id) int request_dma(unsigned int chan, const char *device_id) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret; if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) if (chan >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (xchg(&dma->lock, 1) != 0) Loading @@ -47,7 +47,7 @@ int request_dma(dmach_t channel, const char *device_id) ret = 0; if (dma->d_ops->request) ret = dma->d_ops->request(channel, dma); ret = dma->d_ops->request(chan, dma); if (ret) xchg(&dma->lock, 0); Loading @@ -55,7 +55,7 @@ int request_dma(dmach_t channel, const char *device_id) return ret; bad_dma: printk(KERN_ERR "dma: trying to allocate DMA%d\n", channel); printk(KERN_ERR "dma: trying to allocate DMA%d\n", chan); return -EINVAL; busy: Loading @@ -68,42 +68,42 @@ EXPORT_SYMBOL(request_dma); * * On certain platforms, we have to free interrupt as well... */ void free_dma(dmach_t channel) void free_dma(unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) if (chan >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (dma->active) { printk(KERN_ERR "dma%d: freeing active DMA\n", channel); dma->d_ops->disable(channel, dma); printk(KERN_ERR "dma%d: freeing active DMA\n", chan); dma->d_ops->disable(chan, dma); dma->active = 0; } if (xchg(&dma->lock, 0) != 0) { if (dma->d_ops->free) dma->d_ops->free(channel, dma); dma->d_ops->free(chan, dma); return; } printk(KERN_ERR "dma%d: trying to free free DMA\n", channel); printk(KERN_ERR "dma%d: trying to free free DMA\n", chan); return; bad_dma: printk(KERN_ERR "dma: trying to free DMA%d\n", channel); printk(KERN_ERR "dma: trying to free DMA%d\n", chan); } EXPORT_SYMBOL(free_dma); /* Set DMA Scatter-Gather list */ void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg) void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA SG while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = sg; dma->sgcount = nr_sg; Loading @@ -115,13 +115,13 @@ EXPORT_SYMBOL(set_dma_sg); * * Copy address to the structure, and set the invalid bit */ void __set_dma_addr (dmach_t channel, void *addr) void __set_dma_addr (unsigned int chan, void *addr) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA address while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = NULL; dma->addr = addr; Loading @@ -133,13 +133,13 @@ EXPORT_SYMBOL(__set_dma_addr); * * Copy address to the structure, and set the invalid bit */ void set_dma_count (dmach_t channel, unsigned long count) void set_dma_count (unsigned int chan, unsigned long count) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA count while " "DMA active\n", channel); "DMA active\n", chan); dma->sg = NULL; dma->count = count; Loading @@ -149,13 +149,13 @@ EXPORT_SYMBOL(set_dma_count); /* Set DMA direction mode */ void set_dma_mode (dmach_t channel, dmamode_t mode) void set_dma_mode (unsigned int chan, dmamode_t mode) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (dma->active) printk(KERN_ERR "dma%d: altering DMA mode while " "DMA active\n", channel); "DMA active\n", chan); dma->dma_mode = mode; dma->invalid = 1; Loading @@ -164,42 +164,42 @@ EXPORT_SYMBOL(set_dma_mode); /* Enable DMA channel */ void enable_dma (dmach_t channel) void enable_dma (unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (!dma->lock) goto free_dma; if (dma->active == 0) { dma->active = 1; dma->d_ops->enable(channel, dma); dma->d_ops->enable(chan, dma); } return; free_dma: printk(KERN_ERR "dma%d: trying to enable free DMA\n", channel); printk(KERN_ERR "dma%d: trying to enable free DMA\n", chan); BUG(); } EXPORT_SYMBOL(enable_dma); /* Disable DMA channel */ void disable_dma (dmach_t channel) void disable_dma (unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; if (!dma->lock) goto free_dma; if (dma->active == 1) { dma->active = 0; dma->d_ops->disable(channel, dma); dma->d_ops->disable(chan, dma); } return; free_dma: printk(KERN_ERR "dma%d: trying to disable free DMA\n", channel); printk(KERN_ERR "dma%d: trying to disable free DMA\n", chan); BUG(); } EXPORT_SYMBOL(disable_dma); Loading @@ -207,36 +207,36 @@ EXPORT_SYMBOL(disable_dma); /* * Is the specified DMA channel active? */ int dma_channel_active(dmach_t channel) int dma_channel_active(unsigned int chan) { return dma_chan[channel].active; return dma_chan[chan].active; } EXPORT_SYMBOL(dma_channel_active); void set_dma_page(dmach_t channel, char pagenr) void set_dma_page(unsigned int chan, char pagenr) { printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel); printk(KERN_ERR "dma%d: trying to set_dma_page\n", chan); } EXPORT_SYMBOL(set_dma_page); void set_dma_speed(dmach_t channel, int cycle_ns) void set_dma_speed(unsigned int chan, int cycle_ns) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret = 0; if (dma->d_ops->setspeed) ret = dma->d_ops->setspeed(channel, dma, cycle_ns); ret = dma->d_ops->setspeed(chan, dma, cycle_ns); dma->speed = ret; } EXPORT_SYMBOL(set_dma_speed); int get_dma_residue(dmach_t channel) int get_dma_residue(unsigned int chan) { dma_t *dma = dma_chan + channel; dma_t *dma = dma_chan + chan; int ret = 0; if (dma->d_ops->residue) ret = dma->d_ops->residue(channel, dma); ret = dma->d_ops->residue(chan, dma); return ret; } Loading
arch/arm/mach-footbridge/dma.c +3 −3 Original line number Diff line number Diff line Loading @@ -20,16 +20,16 @@ #include <asm/hardware/dec21285.h> #if 0 static int fb_dma_request(dmach_t channel, dma_t *dma) static int fb_dma_request(unsigned int chan, dma_t *dma) { return -EINVAL; } static void fb_dma_enable(dmach_t channel, dma_t *dma) static void fb_dma_enable(unsigned int chan, dma_t *dma) { } static void fb_dma_disable(dmach_t channel, dma_t *dma) static void fb_dma_disable(unsigned int chan, dma_t *dma) { } Loading