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Commit 1d45ac49 authored by Sylwester Nawrocki's avatar Sylwester Nawrocki Committed by Kukjin Kim
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ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control 



Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
their corresponding D-PHY's enable and reset control.

Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent e24d208d

arch/arm/mach-exynos4/include/mach/regs-clock.h

+3 −1
Original line number Diff line number Diff line
@@ -160,7 +160,9 @@ 
#define S5P_CLKDIV_BUS_GPLR_SHIFT	(4)

#define S5P_CLKDIV_BUS_GPLR_MASK	(0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT)



/* Compatibility defines */

/* Compatibility defines and inclusion */



#include <mach/regs-pmu.h>



#define S5P_EPLL_CON			S5P_EPLL_CON0

arch/arm/mach-exynos4/include/mach/regs-pmu.h

+5 −0
Original line number Diff line number Diff line
@@ -17,6 +17,11 @@ 


#define S5P_PMUREG(x)			(S5P_VA_PMU + (x))



#define S5P_MIPI_DPHY_CONTROL(n)	S5P_PMUREG(0x0710 + (n) * 4)

#define S5P_MIPI_DPHY_ENABLE		(1 << 0)

#define S5P_MIPI_DPHY_SRESETN		(1 << 1)

#define S5P_MIPI_DPHY_MRESETN		(1 << 2)



#define S5P_PMU_CAM_CONF		S5P_PMUREG(0x3C00)

#define S5P_PMU_TV_CONF			S5P_PMUREG(0x3C20)

#define S5P_PMU_MFC_CONF		S5P_PMUREG(0x3C40)

arch/arm/mach-s5pv210/include/mach/regs-clock.h

+4 −1
Original line number Diff line number Diff line
@@ -146,6 +146,10 @@ 
#define S5P_OM_STAT		S5P_CLKREG(0xE100)

#define S5P_USB_PHY_CONTROL	S5P_CLKREG(0xE80C)

#define S5P_DAC_CONTROL		S5P_CLKREG(0xE810)

#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814)

#define S5P_MIPI_DPHY_ENABLE	(1 << 0)

#define S5P_MIPI_DPHY_SRESETN	(1 << 1)

#define S5P_MIPI_DPHY_MRESETN	(1 << 2)



#define S5P_INFORM0		S5P_CLKREG(0xF000)

#define S5P_INFORM1		S5P_CLKREG(0xF004)
@@ -161,7 +165,6 @@ 
#define S5P_MDNIE_SEL		S5P_CLKREG(0x7008)

#define S5P_MIPI_PHY_CON0	S5P_CLKREG(0x7200)

#define S5P_MIPI_PHY_CON1	S5P_CLKREG(0x7204)

#define S5P_MIPI_DPHY_CONTROL	S5P_CLKREG(0xE814)



#define S5P_IDLE_CFG_TL_MASK	(3 << 30)

#define S5P_IDLE_CFG_TM_MASK	(3 << 28)

arch/arm/plat-s5p/Kconfig

+5 −0
Original line number Diff line number Diff line
@@ -74,3 +74,8 @@ config S5P_DEV_CSIS1 
	bool

	help

	  Compile in platform device definitions for MIPI-CSIS channel 1



config S5P_SETUP_MIPIPHY

	bool

	help

	  Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices

arch/arm/plat-s5p/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -31,3 +31,4 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o 
obj-$(CONFIG_S5P_DEV_ONENAND)	+= dev-onenand.o

obj-$(CONFIG_S5P_DEV_CSIS0)	+= dev-csis0.o

obj-$(CONFIG_S5P_DEV_CSIS1)	+= dev-csis1.o

obj-$(CONFIG_S5P_SETUP_MIPIPHY)	+= setup-mipiphy.o