Loading qcom/msm-arm-smmu-lahaina.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #size-cells = <1>; #address-cells = <1>; ranges; dma-coherent; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cc_cx_gdsc>; Loading Loading @@ -77,6 +78,7 @@ #size-cells = <1>; #address-cells = <1>; ranges; dma-coherent; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, Loading Loading
qcom/msm-arm-smmu-lahaina.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #size-cells = <1>; #address-cells = <1>; ranges; dma-coherent; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cc_cx_gdsc>; Loading Loading @@ -77,6 +78,7 @@ #size-cells = <1>; #address-cells = <1>; ranges; dma-coherent; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, Loading