Loading drivers/gpu/msm/adreno_a3xx.c +1 −19 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/firmware.h> #include <linux/of.h> #include <linux/slab.h> Loading Loading @@ -1367,24 +1366,7 @@ static void a3xx_microcode_load(struct adreno_device *adreno_dev) static void a3xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a306a(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a306a(adreno_dev), "clk_set_flags() not supported\n"); } static u64 a3xx_read_alwayson(struct adreno_device *adreno_dev) Loading drivers/gpu/msm/adreno_a5xx.c +3 −21 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/delay.h> #include <linux/firmware.h> #include <linux/of.h> Loading Loading @@ -1170,26 +1169,9 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev, static void a5xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a540(adreno_dev) && !adreno_is_a512(adreno_dev) && !adreno_is_a508(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a540(adreno_dev) || adreno_is_a512(adreno_dev) || adreno_is_a508(adreno_dev), "clk_set_flags() is not supported\n"); } static void a5xx_count_throttles(struct adreno_device *adreno_dev, Loading drivers/gpu/msm/adreno_a6xx.c +2 −19 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/of.h> #include <linux/of_fdt.h> #include <linux/soc/qcom/llcc-qcom.h> Loading Loading @@ -2490,24 +2489,8 @@ static int a6xx_perfcounter_update(struct adreno_device *adreno_dev, static void a6xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a610(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a610(adreno_dev), "clk_set_flags() is not supported\n"); } u64 a6xx_read_alwayson(struct adreno_device *adreno_dev) Loading drivers/gpu/msm/kgsl.c +16 −0 Original line number Diff line number Diff line Loading @@ -327,6 +327,12 @@ static void kgsl_destroy_ion(struct kgsl_dma_buf_meta *meta) } #endif static void kgsl_process_sub_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur -= size; } void kgsl_mem_entry_destroy(struct kref *kref) { Loading Loading @@ -2599,6 +2605,16 @@ static long _gpuobj_map_dma_buf(struct kgsl_device *device, } #endif static void kgsl_process_add_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur += size; if (priv->stats[type].max < priv->stats[type].cur) priv->stats[type].max = priv->stats[type].cur; } long kgsl_ioctl_gpuobj_import(struct kgsl_device_private *dev_priv, unsigned int cmd, void *data) { Loading drivers/gpu/msm/kgsl_device.h +0 −33 Original line number Diff line number Diff line Loading @@ -526,39 +526,6 @@ struct kgsl_snapshot_object { struct kgsl_device *kgsl_get_device(int dev_idx); static inline void kgsl_process_add_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur += size; if (priv->stats[type].max < priv->stats[type].cur) priv->stats[type].max = priv->stats[type].cur; add_mm_counter(current->mm, MM_UNRECLAIMABLE, (size >> PAGE_SHIFT)); } static inline void kgsl_process_sub_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { struct pid *pid_struct; struct task_struct *task; struct mm_struct *mm; priv->stats[type].cur -= size; pid_struct = find_get_pid(priv->pid); if (pid_struct) { task = get_pid_task(pid_struct, PIDTYPE_PID); if (task) { mm = get_task_mm(task); if (mm) { add_mm_counter(mm, MM_UNRECLAIMABLE, -(size >> PAGE_SHIFT)); mmput(mm); } put_task_struct(task); } put_pid(pid_struct); } } static inline bool kgsl_is_register_offset(struct kgsl_device *device, unsigned int offsetwords) { Loading Loading
drivers/gpu/msm/adreno_a3xx.c +1 −19 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/firmware.h> #include <linux/of.h> #include <linux/slab.h> Loading Loading @@ -1367,24 +1366,7 @@ static void a3xx_microcode_load(struct adreno_device *adreno_dev) static void a3xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a306a(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a306a(adreno_dev), "clk_set_flags() not supported\n"); } static u64 a3xx_read_alwayson(struct adreno_device *adreno_dev) Loading
drivers/gpu/msm/adreno_a5xx.c +3 −21 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/delay.h> #include <linux/firmware.h> #include <linux/of.h> Loading Loading @@ -1170,26 +1169,9 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev, static void a5xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a540(adreno_dev) && !adreno_is_a512(adreno_dev) && !adreno_is_a508(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a540(adreno_dev) || adreno_is_a512(adreno_dev) || adreno_is_a508(adreno_dev), "clk_set_flags() is not supported\n"); } static void a5xx_count_throttles(struct adreno_device *adreno_dev, Loading
drivers/gpu/msm/adreno_a6xx.c +2 −19 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. */ #include <linux/clk/qcom.h> #include <linux/of.h> #include <linux/of_fdt.h> #include <linux/soc/qcom/llcc-qcom.h> Loading Loading @@ -2490,24 +2489,8 @@ static int a6xx_perfcounter_update(struct adreno_device *adreno_dev, static void a6xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk, bool on) { if (!adreno_is_a610(adreno_dev)) return; /* Handle clock settings for GFX PSCBCs */ if (on) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } else if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_RETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_RETAIN_MEM); } } else { if (!strcmp(name, "core_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM); } } WARN(adreno_is_a610(adreno_dev), "clk_set_flags() is not supported\n"); } u64 a6xx_read_alwayson(struct adreno_device *adreno_dev) Loading
drivers/gpu/msm/kgsl.c +16 −0 Original line number Diff line number Diff line Loading @@ -327,6 +327,12 @@ static void kgsl_destroy_ion(struct kgsl_dma_buf_meta *meta) } #endif static void kgsl_process_sub_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur -= size; } void kgsl_mem_entry_destroy(struct kref *kref) { Loading Loading @@ -2599,6 +2605,16 @@ static long _gpuobj_map_dma_buf(struct kgsl_device *device, } #endif static void kgsl_process_add_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur += size; if (priv->stats[type].max < priv->stats[type].cur) priv->stats[type].max = priv->stats[type].cur; } long kgsl_ioctl_gpuobj_import(struct kgsl_device_private *dev_priv, unsigned int cmd, void *data) { Loading
drivers/gpu/msm/kgsl_device.h +0 −33 Original line number Diff line number Diff line Loading @@ -526,39 +526,6 @@ struct kgsl_snapshot_object { struct kgsl_device *kgsl_get_device(int dev_idx); static inline void kgsl_process_add_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { priv->stats[type].cur += size; if (priv->stats[type].max < priv->stats[type].cur) priv->stats[type].max = priv->stats[type].cur; add_mm_counter(current->mm, MM_UNRECLAIMABLE, (size >> PAGE_SHIFT)); } static inline void kgsl_process_sub_stats(struct kgsl_process_private *priv, unsigned int type, uint64_t size) { struct pid *pid_struct; struct task_struct *task; struct mm_struct *mm; priv->stats[type].cur -= size; pid_struct = find_get_pid(priv->pid); if (pid_struct) { task = get_pid_task(pid_struct, PIDTYPE_PID); if (task) { mm = get_task_mm(task); if (mm) { add_mm_counter(mm, MM_UNRECLAIMABLE, -(size >> PAGE_SHIFT)); mmput(mm); } put_task_struct(task); } put_pid(pid_struct); } } static inline bool kgsl_is_register_offset(struct kgsl_device *device, unsigned int offsetwords) { Loading