Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1c66b79b authored by Paul Burton's avatar Paul Burton Committed by Paolo Bonzini
Browse files

MIPS: inst.h: Rename b{eq,ne}zcji[al]c_op to pop{6,7}6_op 



The opcodes currently defined in inst.h as beqzcjic_op & bnezcjialc_op
are actually defined in the MIPS base instruction set manuals as pop66 &
pop76 respectively. Rename them as such, for consistency with the
documentation.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent eadfb501

arch/mips/include/uapi/asm/inst.h

+2 −2
Original line number Diff line number Diff line
@@ -32,9 +32,9 @@ enum major_op { 
	sb_op, sh_op, swl_op, sw_op,

	sdl_op, sdr_op, swr_op, cache_op,

	ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,

	lld_op, ldc1_op, ldc2_op, beqzcjic_op = ldc2_op, ld_op,

	lld_op, ldc1_op, ldc2_op, pop66_op = ldc2_op, ld_op,

	sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,

	scd_op, sdc1_op, sdc2_op, bnezcjialc_op = sdc2_op, sd_op

	scd_op, sdc1_op, sdc2_op, pop76_op = sdc2_op, sd_op

};



/*

arch/mips/kernel/branch.c

+2 −2
Original line number Diff line number Diff line
@@ -790,7 +790,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		epc += 4 + (insn.i_format.simmediate << 2);

		regs->cp0_epc = epc;

		break;

	case beqzcjic_op:

	case pop66_op:

		if (!cpu_has_mips_r6) {

			ret = -SIGILL;

			break;
@@ -798,7 +798,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		/* Compact branch: BEQZC || JIC */

		regs->cp0_epc += 8;

		break;

	case bnezcjialc_op:

	case pop76_op:

		if (!cpu_has_mips_r6) {

			ret = -SIGILL;

			break;

arch/mips/math-emu/cp1emu.c

+2 −2
Original line number Diff line number Diff line
@@ -683,14 +683,14 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, 
			dec_insn.next_pc_inc;



		return 1;

	case beqzcjic_op:

	case pop66_op:

		if (!cpu_has_mips_r6)

			break;

		*contpc = regs->cp0_epc + dec_insn.pc_inc +

			dec_insn.next_pc_inc;



		return 1;

	case bnezcjialc_op:

	case pop76_op:

		if (!cpu_has_mips_r6)

			break;

		if (!insn.i_format.rs)