Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1c64bf6f authored by Meny Yossefi's avatar Meny Yossefi Committed by Doug Ledford
Browse files

net/mlx5_core: Add helper function to read IB error counters 



Added helper function to read IB standard error counters
via the PPCNT register.

The PPCNT register read command provides the 32-bit error counters
of both IB/RoCE link layer and transport layer.

Signed-off-by: default avatarMeny Yossefi <menyy@mellanox.com>
Signed-off-by: default avatarMajd Dibbiny <majd@mellanox.com>
Reviewed-by: default avatarMatan Barak <matanb@mellanox.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent b54ba277

drivers/net/ethernet/mellanox/mlx5/core/port.c

+23 −0
Original line number Diff line number Diff line
@@ -324,6 +324,29 @@ int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev, 
}

EXPORT_SYMBOL_GPL(mlx5_query_port_vl_hw_cap);



int mlx5_core_query_ib_ppcnt(struct mlx5_core_dev *dev,

			     u8 port_num, void *out, size_t sz)

{

	u32 *in;

	int err;



	in  = mlx5_vzalloc(sz);

	if (!in) {

		err = -ENOMEM;

		return err;

	}



	MLX5_SET(ppcnt_reg, in, local_port, port_num);



	MLX5_SET(ppcnt_reg, in, grp, MLX5_INFINIBAND_PORT_COUNTERS_GROUP);

	err = mlx5_core_access_reg(dev, in, sz, out,

				   sz, MLX5_REG_PPCNT, 0, 0);



	kvfree(in);

	return err;

}

EXPORT_SYMBOL_GPL(mlx5_core_query_ib_ppcnt);



int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause)

{

	u32 in[MLX5_ST_SZ_DW(pfcc_reg)];

include/linux/mlx5/device.h

+2 −1
Original line number Diff line number Diff line
@@ -1284,7 +1284,8 @@ enum { 
	MLX5_RFC_3635_COUNTERS_GROUP	      = 0x3,

	MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP = 0x5,

	MLX5_PER_PRIORITY_COUNTERS_GROUP      = 0x10,

	MLX5_PER_TRAFFIC_CLASS_COUNTERS_GROUP = 0x11

	MLX5_PER_TRAFFIC_CLASS_COUNTERS_GROUP = 0x11,

	MLX5_INFINIBAND_PORT_COUNTERS_GROUP   = 0x20,

};



static inline u16 mlx5_to_sw_pkey_sz(int pkey_sz)

include/linux/mlx5/driver.h

+2 −0
Original line number Diff line number Diff line
@@ -847,6 +847,8 @@ int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num); 
void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common);

int mlx5_query_odp_caps(struct mlx5_core_dev *dev,

			struct mlx5_odp_caps *odp_caps);

int mlx5_core_query_ib_ppcnt(struct mlx5_core_dev *dev,

			     u8 port_num, void *out, size_t sz);



static inline int fw_initializing(struct mlx5_core_dev *dev)

{

include/linux/mlx5/mlx5_ifc.h

+32 −0
Original line number Diff line number Diff line
@@ -1208,6 +1208,36 @@ struct mlx5_ifc_phys_layer_cntrs_bits { 
	u8         reserved_at_640[0x180];

};



struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {

	u8	   symbol_error_counter[0x10];



	u8         link_error_recovery_counter[0x8];



	u8         link_downed_counter[0x8];



	u8         port_rcv_errors[0x10];



	u8         port_rcv_remote_physical_errors[0x10];



	u8         port_rcv_switch_relay_errors[0x10];



	u8         port_xmit_discards[0x10];



	u8         port_xmit_constraint_errors[0x8];



	u8         port_rcv_constraint_errors[0x8];



	u8         reserved_at_70[0x8];



	u8         link_overrun_errors[0x8];



	u8	   reserved_at_80[0x10];



	u8         vl_15_dropped[0x10];



	u8	   reserved_at_a0[0xa0];

};



struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {

	u8         transmit_queue_high[0x20];
@@ -2618,6 +2648,7 @@ union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits { 
	struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;

	struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;

	struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;

	struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;

	struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;

	u8         reserved_at_0[0x7c0];

};
@@ -6955,6 +6986,7 @@ union mlx5_ifc_ports_control_registers_document_bits { 
	struct mlx5_ifc_peir_reg_bits peir_reg;

	struct mlx5_ifc_pelc_reg_bits pelc_reg;

	struct mlx5_ifc_pfcc_reg_bits pfcc_reg;

	struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;

	struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;

	struct mlx5_ifc_pifr_reg_bits pifr_reg;

	struct mlx5_ifc_pipg_reg_bits pipg_reg;