Loading arch/arm64/kernel/cpufeature.c +1 −1 Original line number Diff line number Diff line Loading @@ -1080,7 +1080,7 @@ static bool cpu_has_broken_dbm(void) /* List of CPUs which have broken DBM support. */ static const struct midr_range cpus[] = { #ifdef CONFIG_ARM64_ERRATUM_1024718 MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0), // A55 r0p0 -r2p0 #endif {}, }; Loading Loading
arch/arm64/kernel/cpufeature.c +1 −1 Original line number Diff line number Diff line Loading @@ -1080,7 +1080,7 @@ static bool cpu_has_broken_dbm(void) /* List of CPUs which have broken DBM support. */ static const struct midr_range cpus[] = { #ifdef CONFIG_ARM64_ERRATUM_1024718 MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0), // A55 r0p0 -r2p0 #endif {}, }; Loading