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Commit 1c0d63eb authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2019-08-29' of... 

Merge tag 'drm-intel-fixes-2019-08-29' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

drm/i915 fixes for v5.3-rc7:
- Fix DP MST max BPC property creation after DRM register
- Fix unused ggtt deballooning and NULL dereference in guest
- Fix DSC eDP transcoder identification
- Fix WARN from DMA API debug by setting DMA max segment size

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87a7bseati.fsf@intel.com
parents c3dd029c 32f0a982

drivers/gpu/drm/i915/display/intel_dp_mst.c

+9 −1
Original line number Diff line number Diff line
@@ -539,6 +539,14 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo 


	intel_attach_force_audio_property(connector);

	intel_attach_broadcast_rgb_property(connector);



	/*

	 * Reuse the prop from the SST connector because we're

	 * not allowed to create new props after device registration.

	 */

	connector->max_bpc_property =

		intel_dp->attached_connector->base.max_bpc_property;

	if (connector->max_bpc_property)

		drm_connector_attach_max_bpc_property(connector, 6, 12);



	return connector;

drivers/gpu/drm/i915/display/intel_vdsc.c

+1 −1
Original line number Diff line number Diff line
@@ -541,7 +541,7 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder, 
	pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |

		DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);

	DRM_INFO("PPS2 = 0x%08x\n", pps_val);

	if (encoder->type == INTEL_OUTPUT_EDP) {

	if (cpu_transcoder == TRANSCODER_EDP) {

		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_2, pps_val);

		/*

		 * If 2 VDSC instances are needed, configure PPS for second

drivers/gpu/drm/i915/i915_drv.c

+6 −0
Original line number Diff line number Diff line
@@ -1598,6 +1598,12 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 


	pci_set_master(pdev);



	/*

	 * We don't have a max segment size, so set it to the max so sg's

	 * debugging layer doesn't complain

	 */

	dma_set_max_seg_size(&pdev->dev, UINT_MAX);



	/* overlay on gen2 is broken and can't address above 1G */

	if (IS_GEN(dev_priv, 2)) {

		ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(30));

drivers/gpu/drm/i915/i915_vgpu.c

+3 −0
Original line number Diff line number Diff line
@@ -101,6 +101,9 @@ static struct _balloon_info_ bl_info; 
static void vgt_deballoon_space(struct i915_ggtt *ggtt,

				struct drm_mm_node *node)

{

	if (!drm_mm_node_allocated(node))

		return;



	DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n",

			 node->start,

			 node->start + node->size,