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Commit 1bcddfb1 authored by Meng Wang's avatar Meng Wang Committed by Gerrit - the friendly Code Review server
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asoc: bolero: increase tx_mclk_users when enabling VA-MCLK 



When enabling SVA, tx_mclk_users is not increased. If starting
and stopping recording after enabling SVA, tx_mclk will be closed
when powering down tx mclk widget. Increase tx_mclk_users when
enabling VA_MCLK to avoid mismatch.

Change-Id: I02d9400cf7309464bbba1e6749cfcfcf99f5876a
Signed-off-by: default avatarMeng Wang <mengw@codeaurora.org>
parent 669089fd

asoc/codecs/bolero/tx-macro.c

+34 −24
Original line number Diff line number Diff line
@@ -223,7 +223,6 @@ static int tx_macro_mclk_enable(struct tx_macro_priv *tx_priv, 


	mutex_lock(&tx_priv->mclk_lock);

	if (mclk_enable) {

		if (tx_priv->tx_mclk_users == 0) {

		ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						TX_CORE_CLK,

						TX_CORE_CLK,
@@ -236,6 +235,7 @@ static int tx_macro_mclk_enable(struct tx_macro_priv *tx_priv, 
		}

		bolero_clk_rsc_fs_gen_request(tx_priv->dev,

					true);

		if (tx_priv->tx_mclk_users == 0) {

			regcache_mark_dirty(regmap);

			regcache_sync_region(regmap,

					TX_START_OFFSET,
@@ -266,15 +266,15 @@ static int tx_macro_mclk_enable(struct tx_macro_priv *tx_priv, 
			regmap_update_bits(regmap,

				BOLERO_CDC_TX_CLK_RST_CTRL_MCLK_CONTROL,

				0x01, 0x00);

		}



		bolero_clk_rsc_fs_gen_request(tx_priv->dev,

				false);



		bolero_clk_rsc_request_clock(tx_priv->dev,

				 TX_CORE_CLK,

				 TX_CORE_CLK,

				 false);

	}

	}

exit:

	mutex_unlock(&tx_priv->mclk_lock);

	return ret;
@@ -2466,6 +2466,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
					BOLERO_CDC_TX_CLK_RST_CTRL_FS_CNT_CONTROL,

					0x01, 0x01);

			}

			tx_priv->tx_mclk_users++;

		}

		if (tx_priv->swr_clk_users == 0) {

			dev_dbg(tx_priv->dev, "%s: reset_swr: %d\n",
@@ -2508,6 +2509,13 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
		if (clk_type == TX_MCLK)

			tx_macro_mclk_enable(tx_priv, 0);

		if (clk_type == VA_MCLK) {

			if (tx_priv->tx_mclk_users <= 0) {

				dev_err(tx_priv->dev, "%s: clock already disabled\n",

						__func__);

				tx_priv->tx_mclk_users = 0;

				goto tx_clk;

			}

			tx_priv->tx_mclk_users--;

			if (tx_priv->tx_mclk_users == 0) {

				regmap_update_bits(regmap,

					BOLERO_CDC_TX_CLK_RST_CTRL_FS_CNT_CONTROL,
@@ -2516,6 +2524,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
					BOLERO_CDC_TX_CLK_RST_CTRL_MCLK_CONTROL,

					0x01, 0x00);

			}



			bolero_clk_rsc_fs_gen_request(tx_priv->dev,

						false);

			ret = bolero_clk_rsc_request_clock(tx_priv->dev,
@@ -2529,6 +2538,7 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv, 
				goto done;

			}

		}

tx_clk:

		if (!clk_tx_ret)

			ret = bolero_clk_rsc_request_clock(tx_priv->dev,

						   TX_CORE_CLK,